9020 TTL Search Results

GD404

Abstract: A23-A17 intel bios chip 8 pin detail 9020
Contextual Info: P L X TECHNOLOGY SEE CORP bflssm s D 00003ÖS I b ê IPLX AT 9020 T a CHNOL O 0 V AT ISA Bus Master Interface Chip for Intel 82596 Ethernet Controller NOVEMBER 1991 • ^ -5 ^ -3 3 -3 5 General Description Features The AT 9020 is designed to provide the most compact,

T76B

Abstract: nad 116 intel 82596 CA1X 00D050 microchannel 1391P
Contextual Info: P L X TECHNOLOGY CORP S2E » • b asim i 0 0 Q 0 4 ÔÔ asa » p l x MC 9020 December 1991 Micro Channel Bus Master Interface Chip _ for Intel 82596 Ethernet Controller " r -S :x ~ 3 3 -S > S Features_ General Description_

82596-PORT

Abstract: 9020 ttl AT9020 B3551 intel bios chip 8 pin detail
Contextual Info: P L X TECHNOLOGY C0RP SEE D • bôssm s 00003öS Ibfl H P L X AT 9020 NOVEMBER 1991 AT ISA Bus Master Interface Chip _for Intel 82596 Ethernet Controller 1 ^ 5 ^ -3 3 -3 5 Features_ General Description_

nad 116

Abstract: t428 MC9020 nad 302 soro power TR32 128-pin card reader qfp T76B intel 82596 mco02
Contextual Info: P L X TECHNOLOGY CORP S E E ]> •I baSSlMT 0Ü0Ü4ÔÔ ÔSÔ ■ PLX MC 9020 December 1991 Micro Channel Bus Master Interface Chip _ for Intel 82596 Ethernet Controller 'T ^ 5 a . - 3 ¡ 3 - 9 5 Features_ General Description_

Contextual Info: 13 12 10 <L NOTES: 1. MATERIALS HOUSING: 30 X GLASS-FILLED PBT. UL94 V -0 TERMINAL: BRASS 0.60REF. THICK PLATING: OPTIONAL SEE CHARTS SHEETS 2-9 5Hn TIN OVER 2.5Hn NICKEL ALLOVER SELECTIVE SILVER 2Mn MIN SILVER 3-5Mn TIN OVER 2.5Mn NICKEL ALLOVER 2. PRODUCT CONFORMS TO SPECIFICATION P S -9 9020-00 38/39

TTL 74ls74

Abstract: 74ls74 CI 7473 TTL 7474 7476 JK ttl 7474 14 PIN Jk 7476 7474 PIN DIAGRAM pin diagram 7474 7474 16 PIN
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL MASTER/SLAVE EDGE-TRIGGERED D55 9020 D60 9024, 54/74109, 54S/74S109, 54LS/74LS109 5 ui 9 D UJ -=pi (3 J Q 2 — J SD 0 CP Z o (3 4 K Ä Co “LT in > </> O a 3 -0 K Co ° I- 3 a. I- 3 O 4-0 Co ? 15 D61 54/7474, 54H/74H74,

CI 7474

Abstract: CI 7473 ci 7476 7474 D latch CI 74LS76 CI 74107 TTL 74ls76 fairchild 9024 ci 74LS74 74ls107
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL MASTER/SLAVE EDGE-TRIGGERED D55 9020 D60 9024, 54/74109, 54S/74S109, 54LS/74LS109 ui 9 D UJ 5 -=pi (3 J Q 2 — J SD 0 CP Z o (3 11 4 K Ä 0 Co “LT in > _6 12 CP 3 -0 14 K Co ° 7 o-i- CP 13 —c K Cd °

JK flipflop 9001

Abstract: 9022dc DTL9932 9020DC TTL 9020 9000DC 9000DM 9000FC 9000FM 9001FC
Contextual Info: 9XXX Series CONNECTION DIAGRAMS P IN O U T A 9000 • 9001 9020 • 2222Jw ' ° r\ i f . v JK FLIP-FLOPS COO, ’01 DUAL JK FLIP-FLOPS ’20, ’22) 14] Vcc O R D E R IN G C O D E: See Section 9 PIN PKQS Ceram ic U IP ( D) Flatpak IP) OUT MILITARY GRADE

TTL 74ls74

Abstract: 7474 14 PIN 74ls76 7476 ttl ttl 74ls109 74LS107 74LS73 74ls74 TTL 74ls76 74LS109
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL M A S T E R /S LA V E E D G E -T R IG G E R E D D55 9020 D60 9024, 54/74109, 54S/74S109, 54LS/74LS109 ui 9 D UJ 5 -=pi J Q (3 CP o K Z 2 — J SD 0 _6 Co (3 “LT in > z o Q J CP I- 3 a. 3 O So J - Ö K 4-0

Contextual Info: GENNUM GENU NX n G S 9020 c o r p o r a t i o n Serial Digital Video Input Processor P R E L M H A R Y DA TA S H E E T FEATURES DESCRIPTION fully compatible with SMPTE 259M auto-standard operation to 540 MHz embedded EDH and data processing core selectable loop through or re-serialized EDH-processed

design a BCD counter using j-k flipflop

Abstract: TTL 9020 JK flipflop 9001 9020 ttl 9000 ttl internal diagram of jk flipflop 9022 9022 ttl 335 16 pin ttl 9022xc
Contextual Info: TTL/SSI • 9000 SER IES JK FLIP-FLO PS - 9000, 9001 DUAL JK FLIP-FLO PS - 9020, 9022 D E S C R IP T IO N — Th e T T L 90 00 series has four flip-flops to satisfy the storage requirements of a logic system . A ll are master/slave J K designs and have the same high speed and high noise im m unity as the rest of the 90 00 series. As w ith the gates, all inputs have diode clamps to reduce

9020

Abstract: R9020 TTL 9020 9000dc
Contextual Info: N A T I O N A L S E M I C O N D { L O G I C I OSE D | L S D l l E E 0 G b M 0 7 E E' I 9XXX Series CONNECTION DIAGRAMS PINOUT A 9000 9020 • • T- H -Û 7 -C 7 9001 9022 JK FLIP-FLOPS ’00, ’01 DUAL JK FLIP-FLOPS (’20, ’22) T r JK ( T ÎTJ'Vcc Sd E

3i bios chip

Abstract: 80486 microprocessor block diagram and pin diagram 83932 9010 plx 9020 ttl DP83932 isa bus master 80386 meter bus design Multitasking OF 80386 Multitasking OF 80486
Contextual Info: P L X T E C H N O L O G Y CORP MbE D • bôSSlMT ODOGISb S H P L X T ■ C H N BUS MASTER INTERFACE ICs PRODUCT DESCRIPTION GUIDE September 1991 PLX Technology, Inc., 1991 PLX Technology, Inc., 625 Clyde Avenue, Mountain View, CA 94043 415 960-0448 FAX (415) 960-0479

"network interface controller"

Abstract: intel 82596
Contextual Info: P L X TECHNOLOGY CORP MbE D • bôSSlMT ODOGISb S H P L X 7=52-33-55 T ■ C H N BUS MASTER INTERFACE ICs PRODUCT DESCRIPTION GUIDE September 1991 PLX Technology, Inc., 1991 PLX Technology, Inc., 625 Clyde Avenue, Mountain View, CA 94043 415 960-0448 FAX (415) 960-0479

fairchild 9000-series

Abstract: Fairchild 9020 JK flipflop 9001 a9005 9003XM TTL 9020 pin diagram for all 74 series ttl gates ScansUX984 DIODE CQ 521 cd 9017
Contextual Info: FAIRCHILD SERIES TTL/SSI ABSOLUTE M A X IM U M RA TIN G S above which the useful life may be impaired Storage Temperature Temperature (Ambient) UnderBias V c c P'n Potential to Ground Pin * Input Voltage (dc) * Input Current (dc) Voltage Applied to Outputs (Output HIG H)

JK flip flop IC

Abstract: RS flip flop IC 9022 ic 9022 JK flipflop 9001 toggle type flip flop ic 9022DC
Contextual Info: 9XXX Series CONNECTION DIAGRAMS PINOUT A 90 0 0 • 9001 9 ^ 9 0 2 0 X • 9022 JK FLIP-FLOPS COO, ’01 DUAL JK FLIP-FLOPS ’20, ’22) T— T PKGS OUT Ceramic DIP <D> Flatpak (F) COMMERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%, Ta = 0 “C to +75° C

SP8655A

Contextual Info: 3.2E D PLESSEY SE MI CO NDUC TORS 7520513 001ÜETS 7 éÊk PLESSEY W S e m ic o n d u c t o r s . T -M S -R -O C J SP8655AC 200MHz -f- 32 FIXED MODULUS DIVIDER CONFORMS TO MIL-STD-883C CLASS B The SP8655 is a low power emitter coupled logic counter with open collector outputs capable of driving TTL or CMOS.

AM29F040

Abstract: EDI7F33512C
Contextual Info: EDI7F33512C 512Kx32 Flash 512Kx32 Flash The EDI7F33512, EDI7F233512 and EDI7F433512 are organized as 512Kx32 and 2x512Kx32 and 4x512Kx32 respectively. The modules are based on AMD's AM29F040 - 512Kx8 Flash Device in TSOP packages which are mounted on an FR4 substrate.

D444C

Abstract: D443C g331 D562C D331C G451 g443 d261c D121C h402
Contextual Info: PERFORMANCE SEMICONDUCTOR T Q bS ST ? O O D l E i b 20E D P3G4000 SUB-NANOSECOND GATE ARRAY WITH VHSIC PHASE II FEATURE SIZES D ID ÜMF0IRÜSATI1OS r -w -ii-o ? FEATURES • 4300 Gate, Gate array ■ Low Power Operation, 0.5 W @ 80 MHz Fully TTL or 3.3 Volt CMOS Compatible Input

d444c

Abstract: C1969 G451 D261C G331 G33-1 d686 G781 D501C D562C
Contextual Info: PERFORMANCE SEMICONDUCTOR 20E D T Q bS ST ? O O D l E i b P3G4000 SUB-NANOSECOND GATE ARRAY WITH VHSIC PHASE II FEATURE SIZES D 10 OMIFOIRIH&iriOI r - w - n - o j FEATURES • 4300 Gate, Gate array ■ Low P ow er O peration, 0.5 W @ 80 M Hz Fully TTL o r 3.3 Volt CM OS Com patible Input

D0018

Abstract: 9020 8pin XL9020 XL9020F XL9020P EXEL Microelectronics
Contextual Info: XL9020 EXEL Microelectronics, Inc. 2,048-Bit Serial Electrically Erasable PROM 2.7 to 5.5 Volt Operation FEATURES • 1 MHz Clock Rate • Plastic Dual-in-line “P” Package Extended Temperature Range: -40°C to +85 °C • Low Power Consumption — Active current 1.5 mA

SIL 100-06

Contextual Info: • Quad 2-Input Exclusive-OR-Gate Pin Assignment • Outputs Source/Sink 24 mA • HD74ACT86 has TTL-Compatible Inputs Top View D C Characteristics(unless otherwise specified) Symbol Icc Icc le d Param eter M ax Unit Condition V in = Vcc or Ground, M axim um Quiescent

Contextual Info: MT52C9020 2K x 9 FIFO [M IC R O N FIFO 2K x 9 FIFO FEATURES Very high speed: 1 5 ,2 0 ,25 and 35ns access High-perform ance, low-power CM OS process Single +5V +10% supply Low power: 5mW typ. standby ; 350m W typ. (active) TTL compatible inputs and outputs

c225 diode smd

Abstract: CY7C225-40DC CY7C225 JTs smd diode
Contextual Info: bSE D CYPRESS SEMI CONDUCTOR CVP 5S ö ^ b b 2 c m i a m s CY7C225 CYPRESS SEMICONDUCTOR • Slim 300-mil, 24-pin plastic or her­ metic DIP, 28-pin LCC, or 28-pin PLCC • 5V ±10% V cc, commercial and military • TTL-compatible I/O • Direct replacement for bipolar