8Q512 Search Results

ut8q512

Contextual Info: Standard Products 8Q512 512K X 8 SRAM Advanced Data Sheet UT El i i « mas t, i & 1 m « • V i T i: a t « m February 16, 1999 i FEATURES INTRODUCTION □ 25ns 3.3 v olt supply m axim um address access tim e □ A synchronous operation for com patibility w ith industrystandard 512K x 8 SRA M s

Contextual Info: Standard Products 8Q512 512K x 8 SRAM Preliminary Data Sheet March 12, 2001 FEATURES q 25ns 3.3 volt supply maximum address access time q Asynchronous operation for compatibility with industrystandard 512K x 8 SRAMs q TTL compatible inputs and output levels, three-state

UT8Q512

Contextual Info: Standard Products 8Q512 512K x 8 SRAM Preliminary Data Sheet June 5, 2000 FEATURES q 25ns 3.3 volt supply maximum address access time q Asynchronous operation for compatibility with industrystandard 512K x 8 SRAMs q TTL compatible inputs and output levels, three-state

UT8Q512

Contextual Info: Standard Products 8Q512 512K x 8 SRAM Preliminary Data Sheet November 6, 2000 FEATURES q 25ns 3.3 volt supply maximum address access time q Asynchronous operation for compatibility with industrystandard 512K x 8 SRAMs q TTL compatible inputs and output levels, three-state

ut8q512

Contextual Info: Standard Products 8Q512 512K x 8 SRAM Advanced Data Sheet July 30, 1999 FEATURES q 25ns maximum address access time q Asynchronous operation for compatibility with industrystandard 512K x 8 SRAMs q TTL compatible inputs, output levels specified for both TTL

ut8q512

Contextual Info: Standard Products 8Q512 512K x 8 SRAM Preliminary Data Sheet September 1, 1999 FEATURES q 25ns maximum address access time q Asynchronous operation for compatibility with industrystandard 512K x 8 SRAMs q TTL compatible inputs, output levels specified for both TTL

512K32

Abstract: 8Q512K32 UT8Q512K32
Contextual Info: Standard Products 8Q512K32 16Megabit SRAM MCM Preliminary Data Sheet August 3, 2000 FEATURES q 35ns maximum 3.3 volt supply address access time q MCM contains four (4) 512K x 8 industry-standard asynchronous SRAMs; the control architecture allows operation as 8, 16, 24, or 32-bit data width

512K32

Abstract: 8Q512K32 UT8Q512K32
Contextual Info: Standard Products 8Q512K32 16Megabit SRAM MCM Preliminary Data Sheet November 6, 2000 FEATURES q 35ns maximum 3.3 volt supply address access time q MCM contains four (4) 512K x 8 industry-standard asynchronous SRAMs; the control architecture allows operation as 8, 16, 24, or 32-bit data width