Amphion
Abstract: vhdl code for 4 channel dma controller dct verilog code CS6650 ESVA vhdl code for transpose memory
Contextual Info: CS6650 TM High Definition MPEG-2 Video Decoder Virtual Components for the Converging World The CS6650 high-definition MPEG2 decoder is designed to provide high performance solutions for a broad range of motion image applications. This highly integrated application specific core is developed for standard
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cs6650ds6650-camphionvhdl code for 4 channel dma controller+3dct verilog codeesvavhdl code for transpose memory
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82830
Abstract: 82945 115v 400Hz 7451 84710 82930 PICO Electronics Ultra Miniature 400Hz Power 26v 400Hz 82855 76874
Contextual Info: Ultra Miniature 400Hz Power Transformers: SURFACE MOUNT .375 VA to 2.4 VA Primary Voltages of 115V or 26V SURFACE MOUNT PICO surface mount units utilize materials and methods to withstand extreme temperatures of vapor phase, I.R., and other reflow procedures
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400hzmil-prf-2715v/26v82830+982945115v 400hz74518471082930pico electronics ultra miniature 400hz power26v 400hz8285576874
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4522
Abstract: s 452-2 PICO Electronics Ultra Miniature 400Hz Power 115v 26V 400Hz pico electronics transformers 76854
Contextual Info: Ultra Miniature 400Hz Power Transformers Page 1 of 8 Ultra Miniature 400Hz Power Transformers: SURFACE MOUNT .375 VA to 2.4 VA Primary Voltages of 115V or 26V SURFACE MOUNT PICO surface mount units utilize materials and methods to withstand extreme temperatures of vapor phase, I.R., and other reflow procedures without degradation of
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400hzmil-prf-2715v/26vcom/surface/pe018+64522s 452-2pico electronics ultra miniature 400hz power115v 26v 400hzpico electronics transformers76854
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Convolutional Encoder
Abstract: CS3530 Convolutional Block Interleaver time interleaver "Single-Port RAM" turbo encoder circuit
Contextual Info: CS3530 TM Turbo Encoder Virtual Components for the Converging World The CS3530 Turbo Encoder is designed to provide efficient and high performance solutions for a broad range of applications requiring reliable communications in bandwidth scarce environments such as satellite and mobile
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cs3530cdma2000ds3530convolutional encoder+5convolutionalblock interleaver timeinterleaversingle-port ramturbo encoder circuit
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CS3212
Abstract: forney CS3210
Contextual Info: CS3210/12 TM Reed-Solomon Decoders Virtual Components for the Converging World The CS3210 and CS3212 Reed-Solomon decoders are designed to provide high performance solutions for a broad range of applications requiring forward error correction. These application specific virtual components ASVCs
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cs3210/12cs3210cs3212880mbits+2ds3210forney
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Contextual Info: PICO’S miniature 400 Hz transformers JfSHIfL SURFACE 115V/26V 1fades Primary _ — SBC/ VOLT 5.0 CT IIP \ Serial M ax Humber Height A C D S 76000 .415 10.54} 560 13.97 .095 (2.41) .136 13.43) .010 (0.25) .670 (17.02) .016 0.38) .020 0.51) .060 (162)
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15v/26v |
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system generator REED SOLOMON
Abstract: 02HEX CS3214
Contextual Info: CS3214 High Speed G.709/G,975 Compliant ReedSolomon Decoder - Preliminary Datasheet TM Virtual Components for the Converging World The CS3214 Reed-Solomon Decoder is designed to provide high performance solutions for forward error correction requirements and meets the ITU G.709 standard for Optical Transport Networks OTN providing
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cs3214709/gds3214system generator reed solomon+102hex
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Light Sensitive Alarm Circuit Diagram using 555
Abstract: lucent optical switch 18-pin TX laser 1418t
Contextual Info: microelectronics Advance Data Sheet June 1997 group Lucent Technologies Bell Labs Innovations 1418 2x9 Single-Mode Transceiver with Clock Recovery and Data Retiming • Adheres to Lucent Technologies Microelectronics Group’s Reliability and Qualification Program stan
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18-pinds96-379lwplight sensitive alarm circuit diagram using 555lucent optical switch+218-pin tx laser1418t
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SHA-256 Cryptographic Accelerator
Abstract: verilog code for 128 bit AES encryption CS5311 SHA-1 using vhdl SHA-256 verilog code for 8 bit AES encryption verilog code for aes encryption SHA-512 SHA256 verilog code for 32 bit AES encryption
Contextual Info: CS5310/11/12 Standard Hash Algorithm SHA-1 & SHA-2 Cores TM Virtual Components for the Converging World The CS5310/11/12 Hashing Cores are designed to achieve data authentication in digital broadband, wireless, and multimedia systems. These high performance application specific silicon cores support the Secure Hash
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cs5310/11/12cs5310cs5311sha-256+9ds5310sha-256 cryptographic acceleratorverilog code for 128 bit aes encryptionsha-1 using vhdlverilog code for 8 bit aes encryptionverilog code for aes encryptionsha-512sha256verilog code for 32 bit aes encryption
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verilog code for 32 bit AES encryption
Abstract: vhdl code for aes decryption vhdl code for AES algorithm verilog code for image encryption and decryption verilog code for 128 bit AES encryption vhdl code for aes vhdl code for aes image encryption and decryption vhdl code for aes 192 encryption block diagram simplex Voice encryption
Contextual Info: CS5265/75 TM AES Simplex Encryption/Decryption Cores Virtual Components for the Converging World The CS5265 and CS5275 Simplex AES encryption/decryption1 cores are designed to achieve data privacy in digital broadband, wireless, and multimedia systems. These high performance application specific cores support
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cs5265/75cs5265cs5275ds5265/75+10verilog code for 32 bit aes encryptionvhdl code for aes decryptionvhdl code for aes algorithmverilog code for image encryption and decryptionverilog code for 128 bit aes encryptionvhdl code for aesvhdl code for aes image encryption and decryptionvhdl code for aes 192 encryptionblock diagram simplexvoice encryption
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vhdl code for AES algorithm
Abstract: verilog code for 128 bit AES encryption vhdl code for aes vhdl code for aes decryption verilog code for image encryption and decryption CS524 CS4191 CS5200 CS5210-40 CS5250-80
Contextual Info: CS5210-40 TM High Performance AES Encryption Cores Virtual Components for the Converging World The CS5210-40 series of encryption cores1 are designed to achieve data privacy and authenticity in digital broadband, wireless, and multimedia systems. These high performance application specific silicon cores support
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cs5210-40cs5250-80cs5200ds5210/40+7vhdl code for aes algorithmverilog code for 128 bit aes encryptionvhdl code for aesvhdl code for aes decryptionverilog code for image encryption and decryptioncs524cs4191
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adpcm
Abstract: G716 CS4590
Contextual Info: CS4590 TM High Channel Count ADPCM Speech Coder Preliminary Datasheet Virtual Components for the Converging World The CS4590 Adaptive Differential Pulse Code Modulator ADPCM core is designed to provide high performance solutions for a broad range of applications requiring high channel count speech compression and
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RS encoder
Abstract: 02HEX CS3114 CS3114TM
Contextual Info: CS3114 High Speed G.709/G.975 Compliant Reed-Solomon Encoder TM Virtual Components for the Converging World The CS3114 Reed-Solomon Encoder is designed to provide high performance solutions for forward error correction requirements and meets the ITU G.709 standard for Optical Transport Networks OTN providing
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cs3114709/gds3114rs encoder+202hexcs3114tm
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16-PSK
Abstract: 16PSK viterbi decoder for tcm decoders branch metric XOR 7486 CS3410 64 tcm trellis differential encoder for psk Convolutional Encoder viterbi IESS-308/309
Contextual Info: CS3410 TM High Speed Viterbi/TCM Decoder Virtual Components for the Converging World The CS3410 Viterbi/TCM Decoder is a high performance implementation suitable for a range of Forward Error Correction applications. This highly integrated Application Specific Virtual Component ASVC can be used in
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cs3410de256ds3410-a16-psk+816pskviterbi decoder for tcm decodersbranch metricxor 748664 tcm trellisdifferential encoder for pskconvolutional encoderviterbi iess-308/309
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180NM
Abstract: FPGA 456 CS3112 fpga implementation using rs(255,239) IESS-308 code CS3110 02HEX DS3110 N1 ASIC K3025
Contextual Info: CS3110/12 TM Reed-Solomon Encoders Virtual Components for the Converging World The CS3110 and CS3112 Reed-Solomon encoders are designed to provide high performance solutions for a broad range of applications requiring forward error correction. These application specific cores are developed for high
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cs3110/12cs3110cs3112ds3110+7180nmfpga 456fpga implementation using rs(255,239iess-308 code02hexn1 asick3025
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CS2411
Abstract: CS2411TK CS2411XV DS2411
Contextual Info: CS2411 1024 Point Block Based FFT/IFFT Preliminary Datasheet TM Virtual Components for the Converging World The CS2411 is an online programmable, block-based architecture 1024-point FFT/IFFT core. It is based on a radix4 / radix-16 algorithm that performs FFT/IFFT computation in four computation passes. This highly integrated
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cs24111024-pointradix-161024-word+3ds2411cs2411tkcs2411xv
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idct vhdl code
Abstract: iso 13818-2 transport stream huffman encoding and decoding audio signal using VHDL Amphion Semiconductor CS6651 fpga "motion detection" verilog for 8 point dct in xilinx vhdl code for demultiplexer huffman encoding and decoding using VHDL
Contextual Info: CS6651 TM MPEG-2 Video Decoder for FPGA Virtual Components for the Converging World The CS6651 MPEG2 decoder is designed to provide high performance solutions for a broad range of motion image applications. This highly integrated application specific virtual component ASVC is for standard
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cs6651ds6651idct vhdl codeiso 13818-2 transport stream+6huffman encoding and decoding audio signal using vhdlamphion semiconductorfpga "motion detectionverilog for 8 point dct in xilinxvhdl code for demultiplexerhuffman encoding and decoding using vhdl
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vhdl code for huffman decoding
Abstract: Motion JPEG Codec CS6190 jpeg encoder vhdl code huffman encoding and decoding using VHDL SS jpeg codec VHDL code DCT verilog code for huffman coding vhdl code for transpose memory verilog code for huffman encoding
Contextual Info: CS6190 TM Motion JPEG Codec Virtual Components for the Converging World The CS6190 Motion JPEG M-JPEG Codec is a highly integrated virtual component solution for leading-edge image compression and decompression applications. Its high performance is capable of sustaining data rates of
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cs6190ds6190vhdl code for huffman decodingmotion jpeg codec+7jpeg encoder vhdl codehuffman encoding and decoding using vhdlss jpeg codecvhdl code dctverilog code for huffman codingvhdl code for transpose memoryverilog code for huffman encoding
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CS6150
Abstract: DS6150 "motion jpeg" jpeg decode decoder huffman CS6100 FPGA48
Contextual Info: CS6150 TM Motion JPEG Decoder Virtual Components for the Converging World The CS6150 Motion JPEG M-JPEG Decoder is a highly integrated virtual component solution for leading-edge image decompression applications. Its high performance is capable of sustaining data rates of over 185 megasamples/sec – delivering full motion, full color video images up to 4 megapixels1. Fully compliant with the
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cs6150cs6100ds6150motion jpeg+3jpeg decodedecoder huffmanfpga48
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CS3411
Abstract: Viterbi Decoder CS3410 viterbi IESS-308/309 CS3311 IESS-308 Convolutional Encoder details and application CSC3411AA base-10
Contextual Info: CS3411 TM High Speed Viterbi Decoder Virtual Components for the Converging World The CS3411 Viterbi Decoder is a high performance implementation suitable for a range of Forward Error Correction applications. This highly integrated application specific core can be used in conjunction with other
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cs3411cs3311ds3411viterbi decoder+6cs3410viterbi iess-308/309iess-308convolutional encoder details and applicationcsc3411aabase-10
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16 QAM modulation verilog code
Abstract: 4 QAM modulator demodulator circuitry verilog code for lms adaptive equalizer cs3810 verilog code for TCM decoder VHDL Coding for Pulse Width Modulation vhdl coding for error correction and detection LMS adaptive filter model for FPGA vhdl CS-3810 CS3710
Contextual Info: CS3810 TM 32 QAM Demodulator Virtual Components for the Converging World The CS3810 32 QAM broadband wireless demodulator core has been developed to provide an efficient and highly optimized solution for wireless data networks. Combined with the CS3710 32 QAM modulator core data
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cs3810cs3710155mbpscs5200+9ds381016 qam modulation verilog code4 qam modulator demodulator circuitryverilog code for lms adaptive equalizerverilog code for tcm decodervhdl coding for pulse width modulationvhdl coding for error correction and detectionlms adaptive filter model for fpga vhdlcs-3810
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CS3214
Abstract: 02HEX CS3214TK Reed Solomon decoder DS3214 system generator REED SOLOMON EXCESS 3 code generator and decoder
Contextual Info: CS3214 High Speed G.709/G,975 Compliant ReedSolomon Decoder - Preliminary Datasheet TM Virtual Components for the Converging World The CS3214 Reed-Solomon Decoder is designed to provide high performance solutions for forward error correction requirements and meets the ITU G.709 standard for Optical Transport Networks OTN providing
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cs3214709/gds321402hex+4cs3214tkreed solomon decodersystem generator reed solomonexcess 3 code generator and decoder
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radix-8 FFT
Abstract: 2048-point IFFT radix-2 CS2420 CS2421 2048-POINT xilinx radix-2 fft xilinx
Contextual Info: CS2421 TM 2048/8192-Point IFFT Preliminary Datasheet Virtual Components for the Converging World The CS2421 is an online programmable, 2048/8192-point Inverse Fast Fourier Transform IFFT core. This highly integrated application specific silicon core is based on the radix-4 algorithm and performs 2048-point or 8192point IFFT algorithms in three computation passes. The CS2421 IFFT core is available in both ASIC and FPGA
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cs24212048/8192-point2048-point8192point+7ds2421radix-8 fftifftradix-2cs24202048-point xilinxradix-2 fft xilinx
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BA 3922
Abstract: automatic clock room light optical module 1X9
Contextual Info: Advance Data Sheet September 1996 microelectronics group Lucent Technologies Bell Labs Innovations 1418 1x9 Single-Mode Transceiver Features • ATM/SONET/SDH compatible ■ Uses field-proven, reliable InGaAsP MQW laser ■ Requires single +5 V power supply
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ds96-178lwba 3922automatic clock room lightoptical module 1x9 |
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