AMPHION Search Results

AMPHION Datasheets (30)

Filter by Manufacturer

Amphion Semiconductor

Part	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
1024-Channel-ADPCM	Amphion Semiconductor	1024-Channel ADPCM	Original	PDF	94.51KB	8
256-Channel-ADPCM	Amphion Semiconductor	256-Channel ADPCM	Original	PDF	95.69KB	8
512-Channel-ADPCM	Amphion Semiconductor	512-Channel ADPCM	Original	PDF	87.15KB	6
CS3210	Amphion Semiconductor	Reed-Solomon Decoder	Original	PDF	510.75KB	8
CS3212	Amphion Semiconductor	Reed-Solomon Decoder	Original	PDF	510.75KB	8
CS3310	Amphion Semiconductor	Programmable Convolution Encoder	Original	PDF	367.6KB	12
CS3410	Amphion Semiconductor	High Speed Viterbi/TCM Decoder	Original	PDF	531.16KB	20
CS3810	Amphion Semiconductor	32 Qam Demodulator	Original	PDF	249KB	12
CS3810	Amphion Semiconductor	32 Qam Demodulator	Original	PDF	167.75KB	6
CS4110	Amphion Semiconductor	ADPCM Speech Coder	Original	PDF	575.92KB	12
CS4120	Amphion Semiconductor	ADPCM Speech Coder	Original	PDF	575.92KB	12
CS4130	Amphion Semiconductor	ADPCM Speech Coder	Original	PDF	575.92KB	12
CS4180	Amphion Semiconductor	ADPCM Speech Coder	Original	PDF	575.92KB	12
CS4190	Amphion Semiconductor	ADPCM Speech Coder	Original	PDF	575.92KB	12

CS4191	Amphion Semiconductor	ADPCM Speech Coder	Original	PDF	575.92KB	12
CS5010	Amphion Semiconductor	DES/3DES Encryption/Decryption Cores	Original	PDF	219.98KB	8
CS5010RR	Amphion Semiconductor	DES/3DES Encryption/Decryption Cores	Original	PDF	219.98KB	8
CS5020RR	Amphion Semiconductor	DES/3DES Encryption/Decryption Cores	Original	PDF	219.98KB	8
CS5030RR	Amphion Semiconductor	DES/3DES Encryption/Decryption Cores	Original	PDF	219.97KB	8
CS6100	Amphion Semiconductor	Motion JPEG Encoder	Original	PDF	660.61KB	12

AMPHION Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
decoder huffman Abstract: Motion JPEG Codec vhdl code for huffman decoding VHDL code DCT dct verilog code mjpeg encoder CS6190 vhdl code for transpose memory huffman encoding and decoding using VHDL "Huffman coding" Contextual Info: Motion JPEG Codec Core V1.0 March 4, 2002 Product Specification AllianceCORE Facts TM Amphion Semiconductor, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001 E-mail: info@amphion.com URL: www.amphion.com Features	Original	decoder huffman motion jpeg codec vhdl code for huffman decoding vhdl code dct +6dct verilog code mjpeg encoder cs6190 vhdl code for transpose memory huffman encoding and decoding using vhdl huffman coding	PDF
CS5200 Abstract: CS5250-80 556 pinout diagram data encryption standard vhdl CS-527 wireless ciphertext Contextual Info: High-Performance Decryption Cores January 28, 2002 Product Specification AllianceCORE Facts Core Specifics See Table 1 Provided with Core TM Amphion Semiconductor, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001	Original	128-bit 256-bit 32-bit cs5200 +5cs5250-80 556 pinout diagram data encryption standard vhdl cs-527 wireless ciphertext	PDF
chn 723 Abstract: g.711 simulation quantizer verilog code Contextual Info: 1024-Channel ADPCM February 26, 2001 Product Specification AllianceCORE Facts TM Amphion Semiconductor, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001 E-Mail: info@amphion.com URL: www.amphion.com Features	Original	1024-channel simplex/512 chn 723 g.711 simulation +1quantizer verilog code	PDF
CS5230 Abstract: cs6100 CS5220 CS-524 cs5240 CS5210-40 XCV100E power AES 256 encryption 32 bit CS5200 CS52-10 Contextual Info: High-Performance Encryption Cores January 28, 2002 Product Specification AllianceCORE Facts Core Specifics See Table 1 Provided with Core TM Amphion Semiconductor, Ltd. 50 Malone Road Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001	Original	128-bit 256-bit 32-bit cs5230 +9cs6100 cs5220 cs-524 cs5240 cs5210-40 xcv100e power aes 256 encryption 32 bit cs5200 cs52-10	PDF
huffman code generator in verilog Abstract: verilog code for huffman coding huffman decoder verilog jpeg encoder vhdl code verilog code for huffman encoding jpeg encoder jpeg encoder RTL IP core encoder verilog coding "Huffman coding" Contextual Info: Motion JPEG Encoder Core V2.0 March 4, 2002 Product Specification AllianceCORE Facts TM Amphion Semiconductor, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001 E-mail: info@amphion.com URL: www.amphion.com	Original	huffman code generator in verilog verilog code for huffman coding huffman decoder verilog jpeg encoder vhdl code +5verilog code for huffman encoding jpeg encoder jpeg encoder rtl ip core encoder verilog coding huffman coding	PDF
vhdl code for huffman decoding Abstract: CS6150 mjpeg decoder jpeg decoder RTL IP core CS6190 VHDL code DCT jpeg encoder vhdl code Variable Length Decoder VLD huffman decoder verilog Contextual Info: Motion JPEG Decoder Core V1.0 March 4, 2002 Product Specification AllianceCORE Facts TM Amphion Semiconductor, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001 E-mail: info@amphion.com URL: www.amphion.com	Original	vhdl code for huffman decoding cs6150 mjpeg decoder jpeg decoder rtl ip core +5cs6190 vhdl code dct jpeg encoder vhdl code variable length decoder vld huffman decoder verilog	PDF
4 to 2 compressor 16 bit vhdl Abstract: g.711 simulation 95214 512-Channel-ADPCM g723 ADPCM algorithm ADPCM CHN 711 verilog code for 4-2 compressor quantizer verilog code Contextual Info: 512-Channel ADPCM February 26, 2001 Product Specification AllianceCORE Facts TM Amphion Semiconductor, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001 E-Mail: info@amphion.com URL: www.amphion.com Features	Original	512-channel simplex/256 4 to 2 compressor 16 bit vhdl g.711 simulation +795214 512-channel-adpcm g723 adpcm algorithm adpcm chn 711 verilog code for 4-2 compressor quantizer verilog code	PDF
chn 723 Abstract: chn 711 256-Channel-ADPCM CHN 727 chn 726 Contextual Info: 256-Channel ADPCM February 26, 2001 Product Specification AllianceCORE Facts TM Amphion Semiconductor, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001 E-Mail: info@amphion.com URL: www.amphion.com Features	Original	256-channel simplex/128 chn 723 chn 711 +3256-channel-adpcm chn 727 chn 726	PDF
80C31 instruction set Abstract: XC2S200 pq208 xilinx fifo generator 6.2 application of 8259 microcontroller design BCD adder pal dvb-RCS modem hitachi pbx AX1610 MC68000 opcodes adder xilinx Contextual Info: Vendor Name IP Type Xilinx Xilinx Xilinx sysonchip Xilinx Xilinx Amphion Amphion Amphion Amphion Amphion Xilinx Xilinx NewLogic LogiCORE LogiCORE LogiCORE AllianceCORE LogiCORE LogiCORE AllianceCORE AllianceCORE AllianceCORE AllianceCORE AllianceCORE LogiCORE	Original	8b/10b do-di-adpcm32 do-di-adpcm64 cc-201 +15cc-200 crc10 cc-130 crc32 cc-131 80c31 instruction set xc2s200 pq208 xilinx fifo generator 6.2 application of 8259 microcontroller design bcd adder pal dvb-rcs modem hitachi pbx ax1610 mc68000 opcodes adder xilinx	PDF
Amphion Abstract: vhdl code for 4 channel dma controller dct verilog code CS6650 ESVA vhdl code for transpose memory Contextual Info: CS6650 TM High Definition MPEG-2 Video Decoder Virtual Components for the Converging World The CS6650 high-definition MPEG2 decoder is designed to provide high performance solutions for a broad range of motion image applications. This highly integrated application specific core is developed for standard	Original	cs6650 ds6650-c amphion vhdl code for 4 channel dma controller +3dct verilog code esva vhdl code for transpose memory	PDF
CS6100 Abstract: Huffman 1000X CS6150 Variable Length Decoder VLD Contextual Info: CS6150 Motion JPEG Decoder Virtual Components for the Converging World The CS6150 Motion JPEG M-JPEG Decoder is a highly integrated virtual component solution for leadingedge image decompression applications. Its high performance is capable of sustaining data rates of over 125	Original	cs6150 cs6100 ds6150-b huffman +21000x variable length decoder vld	PDF
cs3411 Abstract: viterbi decoder soft bit viterbi Contextual Info: CS3411QL Viterbi Decoder k=7, r=1/2 Data Sheet Executive Summary Module BSC256FFT Device QuickDSP QL7180 -7 Worst Case Speed Grade 3714/3966 (91.2%/98.4%) Area (no buffers/ buffered) 18 of 36 (50%) RAM Cells used 36 MHz Maximal Clock Frequency Device Highlights	Original	cs3411ql bsc256fft ql7180 cs3411 +2viterbi decoder soft bit viterbi	PDF
CS31 Abstract: CIRCUIT DIAGRAM 7404 functional DIAGRAM 7404 IESS-308 code 02HEX CS3110 CS3112 K3025 Artisan Components Contextual Info: CS3110/12 Reed-Solomon Encoders Virtual Components for the Converging World The CS3110 and CS3112 Reed-Solomon encoders are designed to provide high performance solutions for a broad range of applications requiring forward error correction. These application specific	Original	cs3110/12 cs3110 cs3112 ds3110-b +7cs31 circuit diagram 7404 functional diagram 7404 iess-308 code 02hex k3025 artisan components	PDF
CS3210 Abstract: 02HEX CS3212 CSO3210 Contextual Info: CS3210/12 Reed-Solomon Decoders Virtual Components for the Converging World The CS3210 and CS3212 Reed-Solomon decoders are designed to provide high performance solutions for a broad range of applications requiring forward error correction. These application specific virtual components	Original	cs3210/12 cs3210 cs3212 880mbits +3ds3210-b 02hex cso3210	PDF

Convolutional Encoder Abstract: CS3530 Convolutional Block Interleaver time interleaver "Single-Port RAM" turbo encoder circuit Contextual Info: CS3530 TM Turbo Encoder Virtual Components for the Converging World The CS3530 Turbo Encoder is designed to provide efficient and high performance solutions for a broad range of applications requiring reliable communications in bandwidth scarce environments such as satellite and mobile	Original	cs3530 cdma2000 ds3530 convolutional encoder +5convolutional block interleaver time interleaver single-port ram turbo encoder circuit	PDF
viterbi IESS-308/309 Abstract: xilinx logicore core dds Automatic Railway Gate Control system, CORDIC system generator xilinx xilinx logicore core dds square wave XAPP474 CORDIC to generate sine wave fpga spartan3 fpga development boards dvb-s encoder design with fpga Sequential IESS-308/309 Contextual Info: Application Note: Spartan-3 FPGA Series R Using IP Cores in Spartan-3 Generation FPGAs XAPP474 v1.1 June 19, 2005 Summary This document provides an overview of the Xilinx CORE Generator System and the Xilinx Intellectual Property (IP) offerings that facilitate the Spartan™-3 Generation design process.	Original	xapp474 27mhz viterbi iess-308/309 xilinx logicore core dds +7automatic railway gate control system cordic system generator xilinx xilinx logicore core dds square wave cordic to generate sine wave fpga spartan3 fpga development boards dvb-s encoder design with fpga sequential iess-308/309	PDF
CS3212 Abstract: forney CS3210 Contextual Info: CS3210/12 TM Reed-Solomon Decoders Virtual Components for the Converging World The CS3210 and CS3212 Reed-Solomon decoders are designed to provide high performance solutions for a broad range of applications requiring forward error correction. These application specific virtual components ASVCs	Original	cs3210/12 cs3210 cs3212 880mbits +2ds3210 forney	PDF
16 QAM modulation matlab code Abstract: lx5280 CZ80PIO PLD-10 uart 8250 CRC matlab lEXRA lx5280 qpsk simulink matlab OFDM DSP Builder Alcatel dsp Contextual Info: インテレクチャル・プロパティ・セレクタ・ガイド System-on-a-Programmable-ChipソリューションのためのIPファンクションアルテラのIPファンクションについて数百万ゲートのプログラマブル・ロジック・デバイス（PLD）の登	Original	ampp15 16 qam modulation matlab code lx5280 cz80pio +7pld-10 uart 8250 crc matlab lexra lx5280 qpsk simulink matlab ofdm dsp builder alcatel dsp	PDF
datasheet transistor said horizontal tt 2222 Abstract: interface of rs232 to UART in VHDL xc9500 80C31 instruction set apple ipad schematic drawing 8 bit alu in vhdl mini project report apple ipad 2 circuit schematic apple ipad Apple iPad 2 panasonic inverter dv 700 manual TT 2222 Horizontal Output Transistor pins out Contextual Info: Virtex-II Platform FPGA User Guide UG002 v2.2 5 November 2007 R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the	Original	ug002 datasheet transistor said horizontal tt 2222 interface of rs232 to uart in vhdl xc9500 80c31 instruction set +7apple ipad schematic drawing 8 bit alu in vhdl mini project report apple ipad 2 circuit schematic apple ipad apple ipad 2 panasonic inverter dv 700 manual tt 2222 horizontal output transistor pins out	PDF
xilinx vhdl code for floating point square root Abstract: multiplier accumulator MAC code verilog multi channel UART controller using VHDL 80C31 instruction set vhdl code of 32bit floating point adder verilog code for floating point adder xilinx logicore fifo generator 6.2 xilinx vhdl code for floating point square root o vhdl code for 3-8 decoder using multiplexer vhdl code 32bit LFSR Contextual Info: R Using the CORE Generator System Introduction This section on the Xilinx CORE Generator System and the Xilinx Intellectual Property IP Core offerings is provided as an overview of products that facilitate the Virtex-II design process. For more detailed and complete information, consult the CORE Generator	Original	xc2v1000-4 ug002 xilinx vhdl code for floating point square root multiplier accumulator mac code verilog +8multi channel uart controller using vhdl 80c31 instruction set vhdl code of 32bit floating point adder verilog code for floating point adder xilinx logicore fifo generator 6.2 xilinx vhdl code for floating point square root o vhdl code for 3-8 decoder using multiplexer vhdl code 32bit lfsr	PDF
4x4 unsigned multiplier VERILOG coding Abstract: vhdl code for lvds driver 32x32 multiplier verilog code MULT18X18 12v relay interface with cpld in vhdl verilog/verilog code for lvds driver 80C31 instruction set vhdl code for 18x18 unSIGNED MULTIPLIER vhdl pulse interval encoder book national semiconductor Contextual Info: R Chapter 2 Design Considerations Summary This chapter covers the following topics: • • • • • • • • • • • • • • • • • Rocket I/O Transceiver Processor Block Global Clock Networks Digital Clock Managers DCMs Block SelectRAM Memory	Original	ug012 4x4 unsigned multiplier verilog coding vhdl code for lvds driver 32x32 multiplier verilog code +7mult18x18 12v relay interface with cpld in vhdl verilog/verilog code for lvds driver 80c31 instruction set vhdl code for 18x18 unsigned multiplier vhdl pulse interval encoder book national semiconductor	PDF
system generator REED SOLOMON Abstract: 02HEX CS3214 Contextual Info: CS3214 High Speed G.709/G,975 Compliant ReedSolomon Decoder - Preliminary Datasheet TM Virtual Components for the Converging World The CS3214 Reed-Solomon Decoder is designed to provide high performance solutions for forward error correction requirements and meets the ITU G.709 standard for Optical Transport Networks OTN providing	Original	cs3214 709/g ds3214 system generator reed solomon +102hex	PDF
8 bit Array multiplier code in VERILOG Abstract: vhdl code for radix-4 fft ecu input and output vhdl code of 32bit floating point adder IESS-309 vhdl code of floating point adder ecu BLOCK DIAGRAM vhdl code for ieee 754 32-bit floating point adder ieee floating point multiplier verilog low pass fir Filter VHDL code Contextual Info: QuickDSPTM Family Data Sheet QuickDSP: Combining Embedded DSP Blocks, Performance, Density, and Embedded RAM Features Dual Port SRAM QMAC Blocks • Up to 18 Embedded Computational Units, ECUTM ■ Integrated multiply, add, accumulate functions ■ 8-bit multiplier, 16-bit adder with carry	Original	16-bit 8 bit array multiplier code in verilog vhdl code for radix-4 fft ecu input and output +7vhdl code of 32bit floating point adder iess-309 vhdl code of floating point adder ecu block diagram vhdl code for ieee 754 32-bit floating point adder ieee floating point multiplier verilog low pass fir filter vhdl code	PDF
SHA-256 Cryptographic Accelerator Abstract: verilog code for 128 bit AES encryption CS5311 SHA-1 using vhdl SHA-256 verilog code for 8 bit AES encryption verilog code for aes encryption SHA-512 SHA256 verilog code for 32 bit AES encryption Contextual Info: CS5310/11/12 Standard Hash Algorithm SHA-1 & SHA-2 Cores TM Virtual Components for the Converging World The CS5310/11/12 Hashing Cores are designed to achieve data authentication in digital broadband, wireless, and multimedia systems. These high performance application specific silicon cores support the Secure Hash	Original	cs5310/11/12 cs5310 cs5311 sha-256 +9ds5310 sha-256 cryptographic accelerator verilog code for 128 bit aes encryption sha-1 using vhdl verilog code for 8 bit aes encryption verilog code for aes encryption sha-512 sha256 verilog code for 32 bit aes encryption	PDF

AMPHION Search Results

AMPHION Datasheets (30)

AMPHION Datasheets Context Search

decoder huffman

CS5200

chn 723

CS5230

huffman code generator in verilog

vhdl code for huffman decoding

4 to 2 compressor 16 bit vhdl

chn 723

80C31 instruction set

Amphion

CS6100

cs3411

CS31

CS3210

Convolutional Encoder

viterbi IESS-308/309

CS3212

16 QAM modulation matlab code

datasheet transistor said horizontal tt 2222

xilinx vhdl code for floating point square root

4x4 unsigned multiplier VERILOG coding

system generator REED SOLOMON

8 bit Array multiplier code in VERILOG

SHA-256 Cryptographic Accelerator