83C55R Search Results

Contextual Info: HAFa=as^ \ HS-83C55RH S E M I C O N D U C T O R Radiation Hardened 16K Bit CMOS ROM May 1997 Pinout Features HS-83C55RH 40 LEAD BRAZE SEAL DIP COMPLIANT OUTLINE D5, CONFIGURATION 3 • Radiation Hardened EPI-CMOS - Total Dose 1 x 105 RAD Si - Transient Upset > 1 x 108 RAD(Si)/s (Ports and DDR)

intel 8355

Abstract: 108RAD
Contextual Info: ED ND S E M N OM ESIG C H E D T R EW 647R O N -65 RN FO E HS SE S E M I C O N D U C T O R September 1997 HS-83C55RH Radiation Hardened 16K Bit CMOS ROM Features Pinout • Radiation Hardened EPI-CMOS - Total Dose 1 x 105 RAD Si - Transient Upset > 1 x 108 RAD(Si)/s (Ports and DDR)

AD315

Abstract: intel 8355
Contextual Info: HS-83C55RH fü HARRIS S E M I C O N D U C T O R Radiation Hardened 16K B it CMOS ROM November 1994 Pinout Features • Radiation Hardened EPI-CMOS - Total Dose 1 x 1 0 5 RAD Si - Transient Upset >1 x 108 RAD(Si)/s (Ports and DDR) - Latch-Up Free > 1 x 1012 RAD(Si)/s

intel 8355

Abstract: A8-10 HS-80C85RH HS-83C55RH pin diagram of 8355 hs 111-0
Contextual Info: HS-83C55RH Radiation Hardened ED 16K Bit CMOS ROM ND S September 1997 E at MM SIGN r r e O t o en /tsc EC DE m T R EW 47RH ort C cPinout o Features O N R N S-656 Supp ersil. O F H al nt HS-83C55RH 40 LEAD BRAZE SEAL DIP • Radiation Hardened EPI-CMOS EE chnic ww.i

intel 8355

Contextual Info: h a r f m s ^ \H S -8 3 C 5 5 R H Radiation Hardened 16K Bit CMOS ROM S e p te m b e r 1997 Pinout Features Radiation Hardened EPI-CMOS - Total Dose 1 x 105 RAD Si - Transient Upset >1 x 108 RAD(Si)/s (Ports and DDR) - Latch-Up Free > 1 x 1012 RAD(Si)/s HS-83C55RH 40 LEAD BRAZE SEAL DIP

intel 8355

Abstract: intel 8355 ic 8355 rom chip A8-10 A8-15 HS-80C85RH HS-83C55RH ior scr
Contextual Info: HS-83C55RH A8-10 HS-83C55RH 2K BYTES A15 CE2 IO/M READY CLK IOW RD ALE VDD AD0-7 IOR A8-10 HS-83C55RH (2K BYTES) A14 CE2 IO/M READY CLK IOW RD ALE VDD AD0-7 IOR A8-10 HS-83C55RH (2K BYTES) A13 CE2 IO/M READY CLK IOW RD ALE VDD AD0-7 IOR A8-10 HS-83C55RH

intel 8355

Abstract: A8-10 AD07 HS-80C85RH HS-83C55RH F4734 108RAD 83C55RH
Contextual Info: HS-83C55RH S E M I C O N D U C T O R Radiation Hardened 16K Bit CMOS ROM November 1994 Features Pinout • Radiation Hardened EPI-CMOS - Total Dose 1 x 105 RAD Si - Transient Upset > 1 x 108 RAD(Si)/s (Ports and DDR) - Latch-Up Free > 1 x 1012 RAD(Si)/s • 2048 Words x 8 Bits ROM

intel 8355

Contextual Info: HS-83C55RH HARRIS S E M I C O N D U C T O R Radiation Hardened 16K B it CMOS ROM September 1997 Pinout Features • Radiation Hardened EPI-CMOS - Total Dose 1 x 1 0 5 RAD Si - Transient Upset > 1 x 108 RAD(Si)/s (Ports and DDR) - Latch-Up Free > 1 x 1012 RAD(Si)/s

intel 8355

Abstract: 11K-A
Contextual Info: Semiconductor September 1997 HS-83C55RH ED ND S E M N OM ESIG C H E D T R EW 647R O N -65 RN FO E HS SE Radiation Hardened 16K Bit CMOS ROM Features Pinout • Radiation Hardened EPI-CMOS - Total Dose 1 x 105 RAD Si - Transient Upset > 1 x 108 RAD(Si)/s (Ports and DDR)

80c85a

Abstract: 80c85 ic3 chip JS2048
Contextual Info: O K I semiconductor MSM83C 55 - XX RS / GS/JS 2048 x 8 BIT MASK ROM WITH I/O PORTS GENERAL DESCRIPTION The M S M 8 3 C 5 5 is a c o m b in a tio n o f M R O M and I/O device s used in a m ic ro c o m p u te r sy s te m . O w in g to th e a do p ­ tio n o f th e C M O S s ilico n gate te c h n o lo g y , it ope ra te s on a p o w e r s u p p ly as sm all as 1 0 0 fiA m ax. s ta n d b y c u r­

Contextual Info: H S -8 3 C 5 5 R H ¡E r* * 1 R adiation Hardened 16K B it CM O S ROM December 1992 Pinout Features • Radiation Hardened EPI-CMOS - Total Dose 1 x 10s RAD SI - Transient Upset > 1 x 10s RAD(Si)/s (Ports and DDR) - Latch-Up Free > 1 x 1012 RAD(Si)/s

M83C

Abstract: 0PB2 83C55
Contextual Info: O K I semiconductor MSM83C55-XXRS/GS/JS 2048 x 8 BIT MASK ROM WITH I/O PORTS GENERAL DESCRIPTION The M SM 83C 55 is a com bination o f MROM and I/O devices used in a microcom puter system. Owing to the adop­ tion o f the CMOS silicon gate technology, it operates on a power supply as small as 100 pA max. standby cur­