83940DKI Search Results

83940DYILF

Contextual Info: 83940DI DOCUMENT ERRATA Supplemental Information This Document Errata reflects changes required for the device datasheet of 83940DYI, 83940DYILF, 83940DKI and 83940DKILF. Revision History September 9, 2010: First version of documentation errata for this device.

9LPRS477CKL

Abstract: 9LPRS113AKLF 9lprs914eklf 9LPRS918JKLF 9LPRS355BKL 9LPRS393DKLFT CV179CNLG 9FG1903CKLFT 9lprs319dkl 9lprs387
Contextual Info: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA 95138 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: TB0909-03 DATE: 8-Oct-2009 Product Affected: All Products Shipped in Sealed Moisture Barrier Bag (in Tape and Reel form) Date Effective:

ICS83940DI

Abstract: ICS83940DYI MO-220 MPC940L MS-026 IDT TOP SIDE package marking FORMAT
Contextual Info: Low Skew, 1-to18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer ICS83940DI DATA SHEET General Description Features The ICS83940DI is a low skew, 1-to-18 LVPECLto-LVCMOS/LVTTL Fanout Buffer and a member of HiPerClockS the HiPerClockS™ family of High Performance Clock

Contextual Info: Low Skew, 1-to18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer ICS83940DI DATA SHEET General Description Features The ICS83940DI is a low skew, 1-to-18 LVPECL- to-LVCMOS/LVTTL Fanout Buffer. The ICS83940DI has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels.

footprint jedec MS-026 LQFP

Abstract: ICS83940DI ICS83940DYI MO-220 MS-026 83940DYILF
Contextual Info: Low Skew, 1-to18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer ICS83940DI DATA SHEET General Description Features The ICS83940DI is a low skew, 1-to-18 LVPECL- to-LVCMOS/LVTTL Fanout Buffer. The ICS83940DI has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels.

Contextual Info: Low Skew, 1-to18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer ICS83940DI DATA SHEET General Description Features The ICS83940DI is a low skew, 1-to-18 LVPECL- to-LVCMOS/LVTTL Fanout Buffer. The ICS83940DI has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels.

843251AGI-HPLF

Abstract: 810252BKI-02LFT 843003BGI-09LFT NV021AM NV021AML NV021AMLFT 8432DYI-101LF 8430EY-11LF 844S2416CKI 840002AG-01LFT
Contextual Info: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA - 95138 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: TB0910-02 DATE: November 20, 2009 MEANS OF DISTINGUISHING CHANGED DEVICES: Product Affected: Netcom Products Refer to list in Attachment II