8237A Search Results

80286 address decoder

Abstract: buffer register logical block diagram of 80286 working of 80286 100DF CA82C37A MD500 microprocessor 80286 Word Size
Contextual Info: SflE » NEWBRIDGE HICROSYSTENS b S f l f l lD l □□ □1 17 b 073 INBMC CA82C37A CR LÊW * PROGRAMMABLE DMA CONTROLLER '" r S Z - Ì V l° i Pin and functional compatibility with the industry standard 8237/8237A Fully static, high speed - 1 0 , 8 and 5 MHz

P8237A

Abstract: B237A Pin Details of bus controller IC 8282
Contextual Info: 8237A 8237A Multimode DMA Controller ÌAPX86 Family DISTINCTIVE CHARACTERISTICS • • • Four independent DMA channels, each with separate registers for Mode Control, Current Address, Base Address, Current Word Count and Base Word Count Transfer modes: Block, Demand, Single Word, Cascade

Contextual Info: intei 82C37A-5 CHMOS HIGH PERFORMANCE PROGRAMMABLE DMA CONTROLLER Pin Compatible with NMOS 8237A-5 Address Increment or Decrement Enable/Disable Control of Individual DMA Requests High performance: 5 MHz Speed Transfers up to 1.6 MBytes/Second Fully Static Design with Frequency

Contextual Info: 3 Morris? HS-82C37ARH Radiation Hardened CMOS High Performance Programmable DMA Controller August 1995 Features Description • Radiation Hardened The Harris HS-82C37ARH is an enhanced, radiation hardened CMOS version of the industry standard 8237A Direct Memory Access DMA) controller, fabricated using the

231466

Abstract: AP 67 interfacing of 8237 with 8085 interfacing of 8237 with 8086 8237 interface with 8086 Peripheral block diagram 8284A clock generator driver 8086 8237A-5 8237A transfer modes TCYb100 8085 microprocessor
Contextual Info: 8237A HIGH PERFORMANCE PROGRAMMABLE DMA CONTROLLER 8237A-5 Y Enable Disable Control of Individual DMA Requests Y Directly Expandable to Any Number of Channels Y Four Independent DMA Channels Y Y Independent Autoinitialization of All Channels End of Process Input for Terminating

1/Tundra+80c85

Contextual Info: CA82C37A f l TUNDRA PROGRAMMABLE DMA CONTROLLER Pin and functional compatibility with the industry standard 8237/8237A Fully static, high speed -1 0 ,8 and 5 MHz versions available Low power CMOS implementation TTL input/output compatibility Compatible with 8080/85,8086/88,80286/386 and

Contextual Info: CFI2370A CFI2370A CFI2370A DMA Controller DESCRIPTION: CFI2370A is compatible in functionality with the Intel 8237A 4-channel programmable DMA controller. Performance is improved mu c h over that of the standard part. I/Os can be made compatible to the standard part, as shown in the diagram on page 5 of

Contextual Info: 82C37A Data Sheet CMOS High Performance Programmable DMA Controller October 25, 2011 FN2967.3 Features • Compatible with the NMOS 8237A The 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access DMA controller, fabricated using Intersil’s advanced 2 micron CMOS process. Pin

working of 80286

Abstract: CA82C37A 80286 register organization B5061 CA82C37
Contextual Info: TUNDRA CA82C37A PROGRAMMABLE DMA CONTROLLER Pin and functional compatibility with the industry standard 8237/8237A Fully static, high speed - 10,8 and 5 MHz versions available Low power CMOS implementation TTL input/output compatibility Compatible with 8080/85,8086/88,80286/386 and

ic dma 8237 8088

Abstract: KS82C37A 8086 timing diagram 8088 microprocessor circuit diagram DMA Controller 8237 80C88 S-12
Contextual Info: KS82C37A PROGRAMMABLE DMA CONTROLLER FEATURES/BENEFITS DESCRIPTION • Pin and functional com patibility with the industry standard 8237/8237A The KS82C37A is a high performance, program m able Direct M em ory Access DMA controller offering pinfor-pin functional com patibility with the industry standard

K362C

Abstract: K362
Contextual Info: KS82C37A PROGRAMMABLE DMA CONTROLLER FEATURES/BENEFITS DESCRIPTION • Pin and functional compatibility with the industry standard 8237/8237A The KS82C37A is a high performance, programmable Direct Memory Access DMA controller offering pinfor-pin functional compatibility with the industry standard

SAB8237A

Abstract: SAB8237 8237A-5 9517A
Contextual Info: SAB 8237A, SAB 8237A-5 High Performance Programmable DMA Controller • Four Independent DM A Channels • Directly Expandable to any N um ber o f Channels • Enable/Disable Control o f Individual DM A Requests • End o f Process Input fo r Term inating Transfers

Contextual Info: in te i 82C37A-5 CHMOS HIGH PERFORMANCE PROGRAMMABLE DMA CONTROLLER Pin Compatible with NMOS 8237A-5 Address Increment or Decrement Enable/Disable Control of Individual DMA Requests High performance: 5 MHz Speed Transfers up to 1.6 MBytes/Second Fully Static Design with Frequency

AP 67

Abstract: 8237 interface with 8086 Peripheral block diagram 8237A
Contextual Info: intei 8237A HIGH PERFORMANCE PROGRAMMABLE DMA CONTROLLER 8237A, 8237A-4, 8237A-5 • Enable/Disable Control of Individual DMA Requests ■ Directly Expandable to Any Number of Channels ■ Four Independent DMA Channels ■ End of Process Input for Terminating

Intel 8237A

Abstract: intel 8237A DMA Controller 231369 8237A-5
Contextual Info: Intel 8237A HIGH PERFORMANCE PROGRAMMABLE DMA CONTROLLER 8237A-5 • Enable/Disable Control of Individual DMA Requests ■ Four Independent DMA Channels ■ Independent Autoinitialization of All Channels ■ Memory-to-Memory Transfers ■ Memory Block Initialization

i8237A

Abstract: Pin Details of bus controller IC 8282 S237A D8237A
Contextual Info: in t e i 8237A/8237A-4/8237A-5 HIGH PERFORMANCE PROGRAMMABLE DMA CONTROLLER Enable/Disable Control of Individual DMA Requests • High performance: Transfers up to 1.6M Bytes/Second w ith 5 M Hz 8237A-5 Four Independent DMA Channels ■ Directly Expandable to any Number of

Contextual Info: in te i 82C37A-5 CHMOS HIGH PERFORMANCE PROGRAMMABLE DMA CONTROLLER Pin Compatible with NMOS 8237A-5 Address Increment or Decrement Enable/Disable Control of Individual DMA Requests High performance: 5 MHz Speed Transfers up to 1.6 MBytes/Second Fully Static Design with Frequency

80C88

Abstract: CA82C37A MD500 S21-S22
Contextual Info: CA82C37A CRL PROGRAMMABLE DMA CONTROLLER Pin and functional compatibility with the industry standard 8237/8237A The CA82C37A is a high performance, programmable Direct Memory Access DMA controller offering pin-forpin functional compatibility with the industry standard

82C37A

Abstract: 82C82 CP82C37A-5 CS82C37A-5 IP82C37A-5 IS82C37A-5 NSC800 80C286 80C86 80C88
Contextual Info: 82C37A TM CMOS High Performance Programmable DMA Controller March 1997 Features Description • Compatible with the NMOS 8237A The 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access DMA controller, fabricated using Intersil’s advanced 2 micron CMOS process. Pin

80C286

Abstract: 80C86 80C88 82C37A 82C82 CP82C37A-5 CS82C37A-5 IP82C37A-5 IS82C37A-5 NSC800
Contextual Info: 82C37A S E M I C O N D U C T O R CMOS High Performance Programmable DMA Controller March 1997 Features Description • Compatible with the NMOS 8237A The 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access DMA controller, fabricated

Contextual Info: SAB 82C37B-5/82C37B-8 High-Performance CMOS Programmable DMA Controller SAB 82C37B-5 SAB 82C37B-8 5 MHz 8 MHz • Fully upw ard-com patible to SAB 82C37A CMOS and SAB 8237A(NM OS) • High perform ance: transfers up to 8 M bytes/s w ith 8 MHz SAB 82C37B-8

TRANSISTOR A30

Abstract: A30 TRANSISTOR Intel 8237A
Contextual Info: GFI2370A GFI2370A GFI2370A DMA CONTROLLER GENERAL DESCRIPTION : THE GFI2370A IS COMPATIBLE IN FUNCTIONALITY WITH THE INTEL 8237A 4-CHANNEL PROGRAMMABLE DMA CONTROLLER. THE PERFORMANCE IS MUCH IMPROVED OVER THE STANDARD PART. FOR A DETAILED FUNCTIONAL DESCRIPTION, SEE THE INTEL DATA BOOK.

Contextual Info: m H A R R 82C37A I S S E M I C O N D U C T O R CMOS High Performance Programmable DMA Controller February 1992 Features Description • Compatible with the NMOS 8237A The 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access DMA controller, fabricated

G1434

Contextual Info: 82C37A-5 CHMOS HIGH PERFORMANCE PROGRAMMABLE DMA CONTROLLER • Pin Compatible with NMOS 8237A-5 Address Increment or Decrement ■ Enable/Disable Control of Individual DMA Requests High performance: 5 MHz Speed Transfers up to 1.6 MBytes/Second ■ Fully Static Design with Frequency