81C55
Abstract: intel 8155 80C85 8155 intel microprocessor programming 81C55RH 81C56RH HS-80C85RH HS-81C55RH HS-81C56RH 11KA2
Contextual Info: 5ÖE J> H A RR IS S E M I C O N D SE CT OR HARRIS S E M I C O N D U C T O R 4 3 0 S 27 1 0 0 4 5 5 3 t 217 « H A S HS-81C55RH HS-81C56RH Radiation Hardened 256 x 8 CMOS RAM Decem ber 1992 Features “ * 'P 4 U Pinouts '2 3 r l2 - . 4 0 P IN C E R A M IC D IP
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hs-80c85rh14-biths-81c55/56rh81c55+8intel 815580c858155 intel microprocessor programming81c55rh81c56rhhs-81c55rhhs-81c56rh11ka2
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HS-81C55RH
Abstract: HS-81C56RH 5962R9XXXX01QRC 5962R9XXXX01QXC 5962R9XXXX01VRC 81C55RH 81C56RH HS-80C85RH intel 8155 pa 3029 b
Contextual Info: HS-81C55RH, HS-81C56RH Radiation Hardened 256 x 8 CMOS RAM March 1996 Features Description • Devices QML Qualified in Accordance with MIL-PRF-38535 The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Intersil radiation hardened SelfAligned Junction Isolated SAJI silicon gate technology.
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hs-81c55rhhs-81c56rhmil-prf-38535hs-81c55/56rh+85962r9xxxx01qrc5962r9xxxx01qxc5962r9xxxx01vrc81c55rh81c56rhhs-80c85rhintel 8155pa 3029 b
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81C55
Abstract: s125
Contextual Info: H A R R HS-81C55RH HS-81C56RH I S S E M I C O N D U C T O R Radiation Hardened 256 X 8 CMOS RAM December 1992 Pinouts Features 40 PIN CERAMIC DIP CASE OUTLINE D5, CONFIGURATION 3 • Radiation Hardened EPI-CMOS - Parametrlcs Guaranteed 1 x 10s RAD SI - Transient Upset > 1 x 10 RAD(SI)/s
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hs-81c55rhhs-81c56rhb155/56hs-80c85rh+3hs-81c55/56rh81c55s125
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sem ad 222m
Abstract: ic 8155 timer sem aa 222m T81C
Contextual Info: HS-81C55RH HS-81C56RH HARRIS S E M I C O N D U C T O R Radiation Hardened 256 x 8 CMOS RAM March 1996 Features Description • Devices QML Qualified in Accordance with MIL-PRF-38535 The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Harris radiation hardened SelfAligned Junction Isolated SAJI silicon gate technology.
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hs-81c55rhhs-81c56rhhs-81c55/56rhhs-80c85rh+8500nshs-81g55/56rhhs-81c551-800-4-harrissem ad 222mic 8155 timersem aa 222mt81c
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intel 8155
Abstract: HS1-81C55RH-8 8155 programmable peripheral interface 81C55 81c55 programmable peripheral interface HS-81C56RH 5962R9676601QXC 5962R9676601QYC 5962R9676601VXC 5962R9676601VYC
Contextual Info: HS-81C55RH, HS-81C56RH TM Data Sheet August 2000 File Number Radiation Hardened 256 x 8 CMOS RAM Features The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Intersil radiation hardened SelfAligned Junction Isolated SAJI silicon gate technology.
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hs-81c55rhhs-81c56rhhs-81c55/56rhhs-80c85rh+10500nsintel 8155hs1-81c55rh-88155 programmable peripheral interface81c5581c55 programmable peripheral interface5962r9676601qxc5962r9676601qyc5962r9676601vxc5962r9676601vyc
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intel 8155
Abstract: 8155 port 5962R9XXXX01QRC 5962R9XXXX01QXC 5962R9XXXX01VRC 81C55RH 81C56RH HS-80C85RH HS-81C55RH HS-81C56RH
Contextual Info: HS-81C55RH HS-81C56RH S E M I C O N D U C T O R Radiation Hardened 256 x 8 CMOS RAM March 1996 Features Description • Devices QML Qualified in Accordance with MIL-PRF-38535 The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Harris radiation hardened SelfAligned Junction Isolated SAJI silicon gate technology.
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hs-81c55rhhs-81c56rhmil-prf-38535hs-81c55/56rh+91-800-4-harrisintel 81558155 port5962r9xxxx01qrc5962r9xxxx01qxc5962r9xxxx01vrc81c55rh81c56rhhs-80c85rh
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Contextual Info: m W HS-81C55RH HS-81C56RH HARRIS S E M I C O N D U C T O R Radiation Hardened 256 x 8 CMOS RAM D e c e m b e r 1992 Features Pinouts 40 PIN CERAMIC DIP CASE OUTLINE D5, CONFIGURATION 3 TOP VIEW • R a d ia tio n H a rd e n e d E P I-C M O S - P a r a m e lric s G u a ra n te e d 1 x 1 0 s R A D S i
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80c85
Abstract: Intel 8155 Port IC intel 8155 5962R9XXXX01QXC
Contextual Info: i l i h a r r is HS-81C55RH 81 S E M I C O N D U C T O R Radiation Hardened 256 X 8 CMOS RAM March 1996 Features Description • Devices QM L Qualified in Accordance with MIL-PRF-38535 The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Harris radiation hardened SelfAligned Junction Isolated SAJI silicon gate technology.
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hs-81c55rhhs-81c55/56rhhs-80c85rh500ns+8hs-81c55/56rhhs-81r1-800-4-harris80c85intel 8155 port icintel 81555962r9xxxx01qxc
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Contextual Info: REVISIONS LTR DESCRIPTION A DATE YR-MO-DA Changes in accordance with NOR 5962-R153-96. - glg B Update drawing to meet current MIL-PRF-38535 requirements. glg. APPROVED 96-06-27 Michael A. Frye 13-05-01 Charles F. Saffle REV SHEET REV B B B B B B SHEET 15
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mil-prf-385355962-r153-96 |
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HS1-81C55RH-8
Abstract: SMD marking code sbf SMD MARKING CODE AD0 QML-38535 Defense Electronics Supply Center 81C55RH 81C56RH QML38535
Contextual Info: 1. SCOPE 1.1 Scope. This drawing forms a part of a one part - one part number documentation system see 6.6 herein . Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines
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mil-std-8835962-e292-96hs1-81c55rh-8smd marking code sbf+6smd marking code ad0qml-38535defense electronics supply center81c55rh81c56rhqml38535
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