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8161E18A Datasheets (1)

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Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
8161E18A		GIGA	Synchronous Burst SRAMs, 16Meg, 1M x 18,1.8 V and 2.5 V	Original	PDF	903.2KB	35

8161E18A Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
GS8161E18AT-300 Abstract: 36AD Boundary Scan JTAG Logic Contextual Info: Preliminary 8161E18A T/D /GS8161E32A(D)/GS8161E36A(T/D) 100-Pin TQFP & 165-Bump BGA Commercial Temp Industrial Temp 1M x 18, 512K x 36, 512K x 36 18Mb Sync Burst SRAMs Features • FT pin for user-configurable flow through or pipeline operation • Dual Cycle Deselect (DCD) operation	Original	gs8161e18a /gs8161e32a /gs8161e36a 100-pin +7165-bump 100-lead 8161e18a gs8161exxa gs8161e18at-300 36ad boundary scan jtag logic	PDF
Contextual Info: Revision: 9/26/02 GS8161E18/32/36AD Supplemental Datasheet Information This supplemental information applies to the GS8161E18/36AT datasheet, which you will find attached to this document. This supplement includes a new package offering the 165-bump BGA—Package D , as well as an additional organization (x32, which is	Original	gs8161e18/32/36ad gs8161e18/36at 165-bump bga--x18 +18161e18a	PDF
GS8161E18AT-275 Abstract: GS8161E18AT-300 A1792 Contextual Info: Preliminary GS8161E18/36AT-300/275/250/225/200 1M x 18, 512K x 36 18Mb Sync Burst SRAMs 100-Pin TQFP Commercial Temp Industrial Temp Features • FT pin for user-configurable flow through or pipeline operation • Single Cycle Deselect SCD operation • IEEE 1149.1 JTAG-compatible Boundary Scan	Original	gs8161e18/36at-300/275/250/225/200 100-pin 100-lead 10ithout +48161e18a gs8161e18at-275 gs8161e18at-300 a1792	PDF

Catalog Datasheet

Type

Document Tags

PDF

GS8161E18AT-300

Abstract: 36AD Boundary Scan JTAG Logic
Contextual Info: Preliminary 8161E18A T/D /GS8161E32A(D)/GS8161E36A(T/D) 100-Pin TQFP & 165-Bump BGA Commercial Temp Industrial Temp 1M x 18, 512K x 36, 512K x 36 18Mb Sync Burst SRAMs Features • FT pin for user-configurable flow through or pipeline operation • Dual Cycle Deselect (DCD) operation

Original

gs8161e18a /gs8161e32a /gs8161e36a 100-pin +7

PDF

Contextual Info: Revision: 9/26/02 GS8161E18/32/36AD Supplemental Datasheet Information This supplemental information applies to the GS8161E18/36AT datasheet, which you will find attached to this document. This supplement includes a new package offering the 165-bump BGA—Package D , as well as an additional organization (x32, which is

Original

gs8161e18/32/36ad gs8161e18/36at 165-bump bga--x18 +1

PDF

GS8161E18AT-275

Abstract: GS8161E18AT-300 A1792
Contextual Info: Preliminary GS8161E18/36AT-300/275/250/225/200 1M x 18, 512K x 36 18Mb Sync Burst SRAMs 100-Pin TQFP Commercial Temp Industrial Temp Features • FT pin for user-configurable flow through or pipeline operation • Single Cycle Deselect SCD operation • IEEE 1149.1 JTAG-compatible Boundary Scan

Original

gs8161e18/36at-300/275/250/225/200 100-pin 100-lead 10ithout +4

PDF