7C371I Search Results

Contextual Info: 7C371i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • • • • 32 macrocells in two logic blocks 32 I/O pins

Contextual Info: w ~ CYPRESS Features • 32 macrocells in two logic blocks • 32 I/O pins • 6 dedicated inputs including 2 clock pins • In-System Reprogrammable ISR Flash technology — JTAG interface • No hidden delays • High speed — f M A X = 143 MHz — tpD= 8*5 ns

3.3v to 5v buffer latch

Abstract: preset resistor 3.3v to 5v interface components
Contextual Info: fax id: 6136 PRELIMINARY 7C371i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • • • • 32 macrocells in two logic blocks

Contextual Info: 71i 7C371i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • • • • 32 macrocells in two logic blocks 32 I/O pins

Contextual Info: fax id: 6136 CY7C371 i ^C YPR ESS UltraLogic 32-Macrocell Flash CPLD Features sig ne d to bring the ease of use and high pe rfo rm an ce o f the 22V 10, as w ell as PCI Local Bus S pe cifica tion sup po rt, to high -den sity CPLDs. • 32 m a cro c ells in tw o logic blocks

tunel

Abstract: 140C JESD22
Contextual Info: Cypress Semiconductor Qualification Report QTP# 98116 VERSION 1.0 April, 1998 UltraLogic 32-Macrocell Flash CPLD 7C371i Cypress Semiconductor UltraLogic 32-Mcell Flash CPLD Device: 7C371i Package: 44-pin PLCC QTP# 98116 Version 1.0 Page 2 of 8 April, 1988

Contextual Info: fax id: 6136 1CY 7C37 1i PRELIMINARY 7C371i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • • • • 32 macrocells in two logic blocks

ULTRA37000

Contextual Info: USE ULTRA37000 FOR ALL NEW DESIGNS 7C371i UltraLogic™ 32-Macrocell Flash CPLD Features • • • • • • • • • • • designed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to

l83A

Contextual Info: fax id: 6136 C Y7C371 i p vp v « *1 X X UltraLogic 32-Macrocell Flash CPLD Features • 32 m a croc e lls in two logic b lo c ks • 32 I/O pin s • 5 dedicated inp u ts in c lu d in g 2 clock pins • In-System R e p ro gram m a b le ISR™ Flash te ch n o lo g y

ULTRA37000

Contextual Info: USE ULTRA37000 FOR ALL NEW DESIGNS 7C371i UltraLogic™ 32-Macrocell Flash CPLD Features • • • • • • • • • • • designed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to

Contextual Info: fax id: 6447 Back Using Cypress CPLDs in Mixed-Voltage Systems Introduction Table 1. VCCINT and VCCIO for FLASH370i Improvements in process technologies provide better densities, increased performance and lower power consumption in programmable logic devices. As device dimensions are reduced, the voltage that the transistors can withstand also decreases. The increasing demand for lower system power consumption has brought many new design challenges. Among

Contextual Info: 7C371i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • • • • 32 macrocells in two logic blocks 32 I/O pins

LASH370

Contextual Info: fax id: 6136 7C371i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • • • • 32 macrocells in two logic blocks

Contextual Info: fax id: 6447 Using Cypress CPLDs in Mixed-Voltage Systems Introduction Table 1. VCCINT and VCCIO for FLASH370i Improvements in process technologies provide better densities, increased performance and lower power consumption in programmable logic devices. As device dimensions are reduced, the voltage that the transistors can withstand also decreases. The increasing demand for lower system power consumption has brought many new design challenges. Among

Contextual Info: PRELIMINARY CYPRESS UltraLogic 32-Macrocell Flash CPLD Device CPLD and is part of the FLASH370i “ family of high-density, high­ speed CPLDs. Like all members of the FLASH370i family, the 7C371i is de­ signed to bring the ease of use and high performance of the 22V10, as well as PCI

J67 Package

Contextual Info: PRELIMINARY 7C371i UltraLogict 32ĆMacrocell Flash CPLD Device CPLD and is part of the FLASH370it family of highĆdensity, highĆ speed CPLDs. Like all members of the FLASH370i family, the 7C371i is deĆ signed to bring the ease of use and high performance of the 22V10, as well as PCI

7C375i

Abstract: 37000V
Contextual Info: Using Cypress CPLDs in Mixed-Voltage Systems Introduction Table 1. VCCINT and VCCIO for FLASH370i Improvements in process technologies provide better densities, increased performance and lower power consumption in programmable logic devices. As device dimensions are reduced, the voltage that the transistors can withstand also decreases. The increasing demand for lower system power consumption has brought many new design challenges. Among