7C109 Search Results

Contextual Info: ^ SS WS CYPRESS PRELIMINARY , .^= 131,072 x 8 Static R/W RAM SEMICONDUCTOR Features Functional Description • H ighspeed — tAA = 25 ns T h e CY 7C108 an d CY 7C109 are high-perform anceC M O S static R A M s organized as 131,072 w ords by 8 bits. Easy m em ory ex­

7C109A

Abstract: CY7C109
Contextual Info: Cypress Semiconductor Qualification Report QTP# 98064 VERSION 1.0 April, 1998 1 Meg SRAM, R42HD Technology, Fab 4 Qualification 7C109/CY7C1009 128K x 8 SRAM 5V Operation Cypress Semiconductor, Inc. 128K x 8 SRAM - R42DH Technology - Fab 4 Device: 7C109 (7C109H)

Contextual Info: PRELIMINARY CYPRESS SEMICONDUCTOR 128Kx 8 Static RAM Features Functional Description • High speed T h e C Y 7C109A is a high-perform ance C M O S static R A M organized as 131,072 w ords by 8 bits. Easy m em ory expansion is provided by an active L O W chip enable

SOJ package MSL

Abstract: 7C109A CY7C109 JESD22 R42HD R42HD FAB4
Contextual Info: Cypress Semiconductor Qualification Report QTP# 98085 VERSION 1.0 June, 1998 1 Meg SRAM, R42HD Technology, Hot Aluminum 7C109/CY7C1009 128K x 8 SRAM 5V Operation Cypress Semiconductor, Inc. 1 Meg SRAM - R42HD Technology, Hot Al - Fab 4 Device: 7C109 (7C109H)

Contextual Info: 7c109A: Thursday, November 19,1992 Revision: Thursday, February 18,1993 7C109A PRELIMINARY CYPRESS SEMICONDUCTOR 128K x 8 Static RAM Features Functional Description • Highspeed — tAA = 12 ns • CMOS for optimum speed/power • Low active power — 1020 mW

AB26S

Abstract: 7C109A CY7C109 CY7C109A
Contextual Info: 7C109A PRELIMINARY l ^wSSQBBSf S S ySSt Ì p YJe JkP XRI- XjiïJF ^ 128KX 8 Static RAM Features Functional Description • H ighspeed The 7C109A is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable

Contextual Info: fax id: 1089 =mmmm rrm - CY7C1009V33 C 7C109 V33 PRELIMINARY 128K x 8 Static RAM memory expansion is provided by an active LOW chip enable CE-| , an active HIGH chip enable (CE2), an active LOW out­ put enable (OE), and three-state drivers. Writing to the device

Contextual Info: 128Kx 8 Static RAM Features Functional D escription • High speed — *aa = 20 ns • CMOS for optimum speed/power • Low active power — 770 mW • Low standby power — 165 mW • Automatic power-down when deselected • TTL-compatible inputs and outputs

Contextual Info: fax id: 1047 7C109 CY7C1009 ^C YPR ESS 128K x 8 Static RAM active HIGH chip enable CE 2 , an active LOW output enable (OE), and three-state drivers. Writing to the device is accom plished by taking chip enable one (CE-|) and write enable (WE) inputs LOW and chip enable two (CE 2 ) input HIGH. Data on

cy7c109l-15vi

Abstract: CY7C109L15VI CY7C109L CY7C1009 CY7C109 CY7C1009-15VI cy7c109-15zc CY7C109-15VI
Contextual Info: 7C109 CY7C1009 128K x 8 Static RAM Features • High speed — tAA = 10 ns • Low active power — 1017 mW max., 12 ns • Low CMOS standby power — 55 mW (max.), 4 mW (Low-power version) • 2.0V Data Retention (Low-power version) • Automatic power-down when deselected

Contextual Info: THIS SPEC IS OBSOLETE Spec No: 38-05038 Spec Title: 7C109B, CY7C1009B 128K X 8 STATIC RAM Sunset Owner: Prashanth Jnanendra PRAS Replaced by: NONE 7C109B CY7C1009B 128K x 8 Static RAM Functional Description[1] Features • High speed The 7C109B/CY7C1009B is a high-performance CMOS

ATPA

Abstract: 7130SA100P 24l01 7C263/4-35C 7164S15Y cy9122-25 7133SA35J 7142sa55 7130sa55p cy2149-45c
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2147-35C CY7C147-35C CY7C147-45C CY7C147-35C CY91L22-35C CY7C122-35C CY2147-45C CY2147-35C CY7C148-35C CY7C148-25C+ CY91L22-45C CY93L422AC CY2147-45C CY7C147-45C CY7C148-45C CY7C148-35C

Contextual Info: 7C109D CY7C1009D 1-Mbit 128 K x 8 Static RAM 1-Mbit (128 K × 8) Static RAM Features • Pin- and function-compatible with 7C109B/CY7C1009B ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ ICC = 80 mA at 10 ns ■ Low CMOS standby power ❐ ISB2 = 3 mA

CY7C1009

Abstract: CY7C109
Contextual Info: fax id: 1047 7C109 CY7C1009 128K x 8 Static RAM Features • High speed — tAA = 10 ns • Low active power — 1017 mW max., 12 ns • Low CMOS standby power — 55 mW (max.), 4 mW (Low power version) • 2.0V Data Retention (Low power version) • Automatic power-down when deselected

7C109A

Abstract: CY7C106A CY7C109 JESD22
Contextual Info: Qualification Report December 1996 QTP# 96053/96081, Version 1.2 1 Meg SRAM - R28 Technology CY7C106A 256K x 4 Static RAM 7C109 128K x 8 Static RAM PRODUCT DESCRIPTION for qualification Information provided in this document is intended for generic qualification and technically describes the Cypress part

Contextual Info: 7C109B CY7C1009B 128K x 8 Static RAM Features put Enable OE , and three-state drivers. Writing to the device is accomplished by taking Chip Enable One (CE1) and Write Enable (WE) inputs LOW and Chip Enable Two (CE2) input HIGH. Data on the eight I/O pins (I/O 0 through I/O 7) is then

CY7C1009V33

Abstract: CY7C109V33
Contextual Info: 3 CY7C1009V33 7C109V33 PRELIMINARY 128K x 8 Static RAM Features memory expansion is provided by an active LOW chip enable CE1 , an active HIGH chip enable (CE2), an active LOW output enable (OE), and three-state drivers. Writing to the device is accomplished by taking chip enable one (CE1) and write

Contextual Info: £ O Q l C D E V IC E S IN C O R P O R A T E D L 7 C 1 0 8 / 1 0 9 128K x 8 Static RAM Low Power ESCRIPTION □ 128K x 8 Static RAM with Chip Select Powerdown, Output Enable □ □ □ □ Auto-Powerdown Design Advanced CMOS Technology High Speed — to 17 ns maximum

MSM 6290

Abstract: msm 5562 27c256 intel 62c512 AP 2068 27C512 microchip 62256 57C256 27C512 SGS-THOMSON 27C512-150
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS 2147-35C 7C147-35C 27S03M 54S189M 7C170A-45M 7C170A-35M 2147-45C 2147-35C 27S07AC 7C190-25C 7C171A-35C 7C171A-25C 2147-45C 7C147-45C 27S07AM 7C190-25M 7C171A-45M 7C171A-35M+ 2147-45M+

G 1009l

Abstract: CY7C1009 CY7C109
Contextual Info: fax id: 1047 7C109 CY7C1009 CYPRESS 128K x 8 Static RAM Features active HIG H chip enable C E 2 , an active LO W ou tput enable (OE), and three -state drivers. W riting to the device is a cco m ­ plished by takin g chip enable one (CE-|) and w rite enable (WE)

V32 Package

Abstract: CY7C1009V33 CY7C109V33
Contextual Info: CY7C1009V33 7C109V33 iF c y p r e s s 128K x 8 Static RAM Features memory expansion is provided by an active LOW Chip Enable CE-| , an active HIGH Chip Enable (CE2), an active LOW Out­ put Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable one (CE-|) and Write

Contextual Info: PRELIMINARY CYPRESS 128Kx 8 Static RAM Features Functional D escription • High speed — t/\A = 12 ns • CMOS for optimum speed/power • Low active power — 1020 mW • Low standby power — 250 mW • 2.0V data retention optional — 100 jiW • Automatic power-down when

EPM5128LC

Abstract: IDT CYPRESS CROSS REFERENCE clocks epm5064lc-1 EPM5128LC-1 EPM5064LC EPM5128LC-2 EPM5128GI EPM5128JC-1 8464c 5962-8871309
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2148-35C CY21L48-35C CY7C168A-35C CY7C168A-25C 5962-8871309XX 5962-89839112X CY2148-35C CY7C148-35C CY7C168A-45M CY7C168A-35M+ 5962-8871310RX 5962-8983913RX CY2148-35M CY7C148-35M CY7C169A-35C

Contextual Info: C Y 7 C 1 0 0 9 C Y 7 C 1 0 9 CYPRESS 128K 8 Static RAM active HIGH chip enable CE2 , an active LOW output enable (OE), and three-state drivers. Writing to the device is accom­ plished by taking chip enable one (CE-|) and write enable (WE) inputs LOW and chip enable two (CE2) input HIGH. Data on