77Z77 Search Results

AYAA

Contextual Info: AK93C67 Series Wide Vcc 2.5V — 5.5V 4096 bit Serial Electrically Erasable PROM _ F e a tu r e s _ □ ADVANCED CMOS Ez PROM TECHNOLOGY □ READ/WRITE NON-VOLATILE MEMORY - Wide Vcc (2.5V ~ 5.5V) o p e r a t i o n

kb3940

Abstract: XC2064-70PC44C
Contextual Info: £X1L1N X XC2000 Logic Cell Array Families Product Description Features • Fully Field-Programmable: - I/O functions - Digital logic functions - Interconnections • General-purpose array architecture • Complete user control of design cycle • Compatible arrays with logic cell complexity equiva­

Contextual Info: MOSEL- VITELIC V52C4256 MULTIPORT VIDEO RAM WITH 256K X 4 DRAM AND 5 1 2 X 4 SAM HIGH PERFORMANCE V52C4256 60 PRELIMINARY 80 10 70 ns 80 ns 100 ns 20 ns 25 ns 25 ns 40 ns 50 ns 70 Max. RAS Access Time, tp^c 60 ns Max. CAS Access Time, <tQAC) 15 ns Max. Column Address Access Time, (tAA)

Contextual Info: M OSEL VITELIC V54C316802VA HIGH PERFORMANCE 3.3 VOLT2M X 8 SYNCHRONOUS DRAM 2 BANKS X 1MBit X 8 CAS Latency = 3 PRELIMINARY 8 10 12 System Frequency fCK 125 MHz 100 MHz 83 MHz Clock Cycle Tim e (tcK 3 ) 8 ns 10 ns 12 ns Clock Access Tim e (tAC3) 7 ns 8 ns

74LS161 truth table

Abstract: 74LS161 d161c
Contextual Info: SA NY O S E M I C O N D U C T O R CO RP IE E D I 7 ^ 7 0 7 ^ 0002705 ' î - 4 S - z i > ’ 0 5 II' H 3006B CMOS High-Speed Standard Logic LC74HC Senes Presettable 4-Bit Binary Counter with Asynchronous Reset C *2 03 1 A Features • The LC74HC161 is a synchronous presettable 4-bit binary counter with asynchronous reset. Counting is

B27E

Contextual Info: 3.3 VOLT CMOS SyncBiFlFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2 PRELIMINARY IDT72V3614 Integrated Device Technology, Inc. FEATURES: • T w o independent clocked FIFOs 64 x 36 storage capacity each buffering data in opposite directions • Supports clock frequencies up to 67 MHz

Contextual Info: ADE-203-186A Z i HM5241605 Series 131,072-word x 16-bit x 2-bank Synchronous Dynamic RAM H IT A C H I All inputs and outputs are referred to the rising edge of the clock input. The HMS241605 is offered in 2 banks for improved performance. 3.3 V Power supply

Contextual Info: SIEMENS 512kx8-Bit Dynamic RAM HYB 514800BJ -60/-70/-80 Advanced Information • 512 288 words by 8-bit organization Low power dissipation max. 605 mW active -60 version max. 550 mW active (-70 version) max. 468 mW active (-80 version) • 0 to 70 "C operating temperature

TV THOMPSON 29 DF 170 G

Abstract: Novus 172 HM5241 hitachi tft
Contextual Info: 3 5- 7- 8; 1 4 :2 3 ; R BEStëfi « V f f l « V S H H H IJH A L / S P ; 0 4 2 3 - 2 7 - 8 62 ? HB526A25672EA Series 131,072-word x 72-bit x 2-bank Synchronous Dynamic RAM Module H ITA CH I ADE-203-614 (Z) Preliminary Rev. 0.0 Jul. 5. . 996 Description

Contextual Info: HM5221605 Series 65,536-word x 16-bit x 2-bank Synchronous Dynamic RAM HITACHI ADE-203-199A Z Rev. 1.0 Jun. 22, 1995 Description All inputs and outputs are referred to the rising edge of the clock input. The HM5221605 is offered in 2 banks for improved performance.

EDI8F321024C

Abstract: MC4572
Contextual Info: ^ ED I EDI8F321024C Electronic Designs Inc. High Speed 32 Megabit SRAM Module 1024Kx32 Static RAM CMOS, High Speed Module Features The EDI8F321024C is a high speed 32 megabit Static RAM module organized as 1024K words by 32 bits. This module is constructed from eight 1024Kx4

Contextual Info: 2 4 3 5 — E X D 7 6 78 Signal Kontakte 78 signal contacts Kontaktanordnung contact arrangement 52 50 . . 4 6 42 3 8 . , 34 . 30 . 26 . 22 . 18 48 44 40 36 32 28 24 20 16 U 12 10 Y H = Kontaktposit ion belegt - p o s it io n with contact 6 6 2 2: 1 □ = Kontaktposi M o n nicht belegt

DS1225Y

Contextual Info: DALLAS SEMICONDUCTOR DS1225Y 64K Nonvolatile SRAM FEATURES PIN ASSIGNMENT • Data retention in the absence of Vcc NC I NC * 25 1 AS 24 1 A9 • Over 10 years of data retention • Standard 28-pin JEDEC pinout • Available in 150ns, 170ns, or 200ns read access

HITACHI HA 1457

Contextual Info: HM5216805 Series, HM5216405 Series 1,048,576-word x 8-bit x 2-bank Synchronous Dynamic RAM 2,097,152-word x 4-bit x 2-bank Synchronous Dynamic RAM HITACHI ADE-203-304C Z Rev. 3.0 Jan. 20,1997 Description A ll inputs and outputs are referred to the rising edge of the clock input. The HM5216805 Series, HM5216405

OPB710

Abstract: OPB710F OPB71QF
Contextual Info: OPTEK Product Bulletin OPB710 June 1996 Reflective Object Sensors Types OPB710, QPB710F Features Absolute Maximum Ratings Ta = 25° C unless otherwise noted • • • • Storage Temperature. -20° C to +85° C Operating Temperature R ange. 0° C to +70° C

NS32008

Abstract: 916741 NS32081 NS32032 NS32GX32
Contextual Info: p r e l im i n a r y NS32381-15/NS32381-20/NS32381-25/NS32381-30 Floating-Point Unit General Description The NS32381 is a second generation, CMOS, floating-point slave processor that is fully software compatible with its forerunner, the NS32081 FPU. The NS32381 FPU functions