7777777M Search Results

Contextual Info: SMJ684002 512K BY 84HT STATIC RANDOM-ACCESS MEMORY _ * Single 5-V ± 10% Power Supply HJA/HKE PACKAGE TOP ViEW f • • Fast Access Time 20125/35 ns Equal Address and Chip-Enable Access Time • • • All Inputs and Outputs Are TTL-Compatible

j477

Abstract: V54C365164VC
Contextual Info: M O S E L V IT E L IC V54C365164VC HIGH PERFORMANCE 143/133/125 MHz 3.3 V 0 L T 4 M X 16 SYNCHRONOUS DRAM 4 BANKS X 1Mbit X 16 PRELIMINARY 7 75 8PC 8 System Frequency fCK 143 MHz 133 MHz 125 MHz 125 MHz Clock Cycle Tim e (tcK 3) 7 ns 7.5 ns 8 ns 8 ns Clock Access Tim e (tAC3) CAS Latency = 3

Contextual Info: M O S E L V IT E L IC V54C36516G 4VC H IG H P ER FO R M A N C E 166/143 M H z 3.3 V 0 L T 4 M X 16 E N HA N CED G R A PHICS S D R A M 4 BANKS X 1Mbit X 16 P R E LIM IN A R Y 6 7 System Frequency fCK 166 MHz 143 MHz Clock Cycle Tim e (tcK 3 ) 6 ns 7 ns Clock Access Tim e (tAC3) CAS Latency = 3

Contextual Info: M OSEL VITELIC V54C36516G4V 166/143 MHz 3.3 V 0L T 4M X 16 ULTRA HIGH PERFORMANCE SDRAM 4 BANKS X 1Mbit X 16 PRELIMINARY 6 7 S y s te m F re q u e n c y fCK 166 M H z 143 M H z C lo c k C y c le T im e (tcK 3 ) 6 ns 7 ns C lo c k A c c e s s T im e (tAC3) C A S L a te n c y = 3

Contextual Info: M OSEL VITELIC V54C365164VB HIGH PERFORMANCE 143/133/125 MHz 3.3 V 0 L T 4 M X 16 SYNCHRONOUS DRAM 4 BANKS X 1Mbit X 16 PRELIMINARY 7 75 8PC 8 System Frequency fCK 143 MHz 133 MHz 125 MHz 125 MHz Clock Cycle Tim e (tcK 3 ) 7 ns 7.5 ns 8 ns 8 ns Clock Access Tim e (tAC3) CAS Latency = 3

256KX4

Abstract: V53C104B AA44A V53C104
Contextual Info: Mu ! *m — iw“ VITEUC V53C104B HIGH PERFORMANCE, LOW POWER 256K X 4 B IT FAST PAGE MODE CMOS DYNAMIC RAM PRELIMINARY 60/60L 70/70L 80/80L Max. RAS Access Time, tp ^ 60 ns 70 ns 80 ns Max. Column Address Access Time, (tCAA) 30 ns 35 ns 40 ns Min. Fast Page Mode Cyde Time, (tpç)

ir tk 2238

Abstract: IT191 CA10 V54C365804VC tk 2238 7777777Z
Contextual Info: M O S E L V IT E L IC V54C365804VC HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT8MX8SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 8 PRELIMINARY 7 75 8PC 8 System Frequency fCK 143MHz 133MHz 125 MHz 125 MHz Clock Cycle Tim e (tcK 3 ) 7 ns 7.5 ns 8 ns 8 ns Clock Access Tim e (tAC3) CAS Latency = 3

Contextual Info: ADAM TECH A C INLET/OUTLET IEC 320 CONNECTORS ADAM TECHNOLOGIES INC. I EC SERIES INTRODUCTION: Adam Tech IEC Series Inlet / Outlet Connectors are designed for equipment where the receptacle must be compatible with M ulti­ national product destinations. They are m anufactured under

514256

Abstract: 514256-10 MSM514256 MSM514256-10 MSM514256-12 oki msm51426 A2E3
Contextual Info: O K I SEMICO ND UC T OR GROUP IDE D £ b?5M5MD Q0Q4E02 7 £ Q 5C B sennlcoicfltactog* MSM514256RS/JS/ZS 262,144-WORD X , -r-4L-x*-n _ 4-BITS DYNAMIC RAM GENERAL DESCRIPTION The MSM514256 is a new generation dynamic RAM organized as 262,144 words by 4 bits. The technology

Xm m mx

Contextual Info: M O S E L V IT E L IC V54C328804VC HIGH PERFORMANCE 143/133/125MHz 3.3 VOLT 16M X 8 SYNCHRONOUS DRAM 4 BANKS X 4Mbit X 8 PRELIMINARY 7 75 8 System Frequency fCK 143 MHz 133 MHz 125 MHz Clock Cycle Time (tcK3 ) 7 ns 7.5 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3

T-46-23-15

Abstract: ah rzj IMSM511002AI MSM511002A-1A oki msm
Contextual Info: 4bE ]> w • b72454Q 000^534 RTS « O K I J O K I O K I SEMICONDU CT OR GROUP semiconductor_ M SM 511002A _ 1,048,576-WORD x 1-BITS DYNAMIC RAM GENERAL DESCRIPTION The MSM511002A is a new generation dynam ic RAM organized as 1,048,576 w ords by 1 bit. The

KF939V

Contextual Info: SAW FILTER TECHNICAL DATA KF939V SPECIFICATIONS FOR SAW FILTER Band pass filters for RF circuits of wireless data communication • High stability and reliability with good performance and no adjustment. • Wide and sharp pass band characteristics. • Low insertion loss and deep stop band

Contextual Info: M O S E L V IT E L IC V54C365404VB HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 16M X 4 SYNCHRONOUS DRAM 4 BANKS X 4Mbit X 4 PRELIMINARY 7 75 8P C 8 S y s te m F re q u e n c y fCK 143 M H z 133 M H z 125 M H z 125 M H z C lo c k C y c le T im e (tcK 3 ) 7 ns

Contextual Info: ^ z iiæ Pr o d u c t S p e c if ic a tio n Z5380 SCSI S m a l l C o m p u t e r S y s t e m in ter fa c e FEATURES • C om patible 5380 pinout ■ Arbitration support ■ Low pow er CMOS ■ DMA or program m ed I/O data transfers ■ Asynchronous interface, supports 1.5 MB/s

Contextual Info: M OSEL VITELIC V54C365804VB HIGH PERFORMANCE 143/133/125 MHz 3.3 V O LT 8M X 8S Y N C H R O N O U S DRAM 4 BANKS X 2M bit X 8 PRELIMINARY 7 75 8PC 8 System Frequency fCK 143MHz 133MHz 125 MHz 125 MHz Clock Cycle Tim e (tcK 3 ) 7 ns 7.5 ns 8 ns 8 ns Clock Access Tim e (tAC3) CAS Latency = 3

V53C464-80

Abstract: V53C464-80L V53C464
Contextual Info: 9502310 VIT EL IC CORP 98D 00380 V I T E L I C CO RP Tfl jr “ VITELIC D - T-Vé-23-Z7 DE ^ TSD5310 DODGBflD S | VS3C464 FAMILY HIGH PERFORMANCE, LOW POWER 64 K X 4 B IT FAST PAGE M ODE CMOS D YN A M IC RAM HIGH PERFORMANCE V53C464 70/70L 10/10L 12/12L 80 ns

Contextual Info: < £ 3 LO E P r o d u c t S pecificatio n Z5380 SCSI S m a ll C o m p u te r _ S yste m In te r fa c e SCSI FEATURES • Pin C om patible with the Industry Standard 5380 ■ Supports Target and Initiator Roles ■

Contextual Info: M OSEL VITELIC V54C316162VA HIGH PERFORMANCE 3.3 VOLT 1 M X 16 SYNCHRONOUS DRAM 2 BANKS X 512Kbit X 16 C AS Latency = 3 PRELIMINARY 8 10 12 System Frequency fCK 125 MHz 100 MHz 83 MHz Clock Cycle Tim e (tcK 3 ) 8 ns 10 ns 12 ns Clock Access Tim e (tAC3)

Contextual Info: MOSEL VITELIC V54C365404VA HIGH PERFORMANCE 3 . 3 V O L T 1 6 M X 4 S YNCHRONOUS DRAM 4 BANKS X 4Mbit X 4 PRELIMINARY 7 8 10 12 System Frequency fCK 143 MHz 125 MHz 100 MHz 83 MHz Clock Cycle Tim e (tcK 3 ) 7 ns 8 ns 10 ns 12 ns Clock Access Tim e (tAC3) CAS Latency = 3

Contextual Info: MOSEL VITELIC V54C365804VA HIGH PERFORMANCE 3.3 VOLT8M X 8 SYNCHRONOUS DRAM 4 BANKS X 2M bit X 8 PRELIMINARY 8 10 System Frequency fCK 125 MHz 100 MHz Clock Cycle Tim e (tcK 3) 8 ns 10 ns Clock Access Tim e (tAC3) CAS Latency = 3 7 ns 8 ns Clock Access Tim e (tAC2) CAS Latency = 2

A-TC02

Abstract: IT191 CA10 V54C365404VC
Contextual Info: M O S E L V IT E L IC V54C365404VC HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 16M X 4 SYNCHRONOUS DRAM 4 BANKS X 4Mbit X 4 PRELIMINARY 7 75 8PC 8 System Frequency fCK 143 MHz 133 MHz 125 MHz 125 MHz Clock Cycle Tim e (tcK 3 ) 7 ns 7.5 ns 8 ns 8 ns Clock Access Tim e (tAC3) CAS Latency = 3

cmo 765

Abstract: fs r6a CIRCUIT DIAGRAM CMO 765 RC crystal ntk 8 mhz dw2 18- 2 5t 29740 B1318 crystal oscillator 1 MHz 4 pins ntk Design a 3-bit magnitude comparator by using basi pc key board keys configuration wiring diagram
Contextual Info: m 7 National l i Semiconductor November 1991 DP8344B Biphase Communications Processor— BCP General Description although a TTL-level serial input is also provided for applica­ tions where an external comparator is preferred. The DP8344B BCP is a communications processor de­