74LVQ08 Search Results

74LVQ08

Abstract: 74LVQ08M 74LVQ08MTR 74LVQ08TTR TSSOP14
Contextual Info: 74LVQ08 LOW VOLTAGE CMOS QUAD 2-INPUT AND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.6 ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V

74LVQ08

Abstract: 74LVQ08SC 74LVQ08SJ M14A M14D
Contextual Info: 74LVQ08 Low Voltage Quad 2-Input AND Gate General Description Features The LVQ08 contains four, 2-input AND gates. n Ideal for low power/low noise 3.3V applications n Guaranteed simultaneous switching noise level and dynamic threshold performance n Guaranteed pin-to-pin skew AC performance

Contextual Info: EM ICONDUCTQ R t 74LVQ08 Low Voltage Quad 2-Input AND Gate General Description Features The LVQ08 contains four, 2 -input AND gates. • ideal fo r low pow er/low noise 3.3V applications ■ G uaranteed sim ultaneous sw itching noise level and dynam ic threshold perform ance

74LVQ08

Abstract: 74LVQ08MTR 74LVQ08TTR TSSOP14
Contextual Info: 74LVQ08 LOW VOLTAGE CMOS QUAD 2-INPUT AND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.6 ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V

74LVQ08

Abstract: 74LVQ08SC 74LVQ08SJ M14A M14D
Contextual Info: Revised June 2001 74LVQ08 Low Voltage Quad 2-Input AND Gate General Description Features The LVQ08 contains four, 2-input AND gates. • Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dynamic threshold performance

TSSOP14

Abstract: SO-14 TSSOP-14 SO14 SO-20 74LVQ574 74LVQ373
Contextual Info: LOGIC CIRCUITS LOW VOLTAGE HIGH SPEED CMOS - LVQ 74LVQ SERIES RECOMMENDED OPERATING CONDITIONS Symbol VCC VI TA Parameter Supply Voltage Input Voltage Operating Temperature 74 Series Type 74LVQ00 74LVQ02 74LVQ04 74LVQ08 74LVQ125 74LVQ138 74LVQ14 74LVQ157

Contextual Info: LVQ08 b4E D b S D 1 1 2 2 GG7L.3ÖG 33^ « N S C l National ÆÆ Semiconductor 54LVQ/74LVQ08 Low Voltage Quad 2-Input AND Gate General Description Features The ’LVQ08 contains four, 2-input AND gates. • Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and

74LVQ08

Abstract: TSSOP14 74LVQ08M 74LVQ08T
Contextual Info: 74LVQ08  QUAD 2-INPUT AND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5 ns TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING

74LVQ08

Contextual Info: 74LVQ08 QUAD 2-INPUT AND GATE . HIGH SPEED: tPD = 5 ns TYP. at Vcc = 3.3V • COMPATIBLE WITH TTL OUTPUTS . LOW POWER DISSIPATION: Ice = 2 |oA (MAX.) at TA = 25 °C ■ LOW NOISE: V olp = 0 .3 V (TYP.) at V c c = 3 .3 V ■ 75Q TRANSMISSION LINE DRIVING

74LVQ08

Contextual Info: Æ T SGS-THOMSON D lsi S IILICTIs! iD©S 74LVQ08 QUAD 2-INPUT AND GATE . HIGH SPEED: tPD = 5 ns (TYP.) a tV c c =3.3V . COMPATIBLE WITH TTL OUTPUTS . LOW POWER DISSIPATION: Ice = 2 |xA (MAX.) at T a = 25 °C . LOW NOISE: V o l p = 0.3 V (TYP.) at V c c = 3.3V

74LVQ08

Abstract: 74LVQ08SC 74LVQ08SCX 74LVQ08SJ 74LVQ08SJX M14A M14D
Contextual Info: LVQ08 National Semiconductor 74LVQ08 Low Voltage Quad 2-Input AND Gate General Description Features The LVQ08 contains four, 2-input AND gates. • Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dynamic threshold performance

Contextual Info: LVQ08 National ÆÆ Semiconductor 54LVQ/74LVQ08 Low Voltage Quad 2-Input AND Gate General Description Features The 'LVQ08 contains four, 2-input AND gates. • Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and

74LVQ08

Abstract: 74LVQ08M 74LVQ08T TSSOP14
Contextual Info: 74LVQ08 QUAD 2-INPUT AND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5 ns TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING

Contextual Info: R C H II_ D EM IC O N D U C TQ R r 74LVQ08 Low Voltage Quad 2-Input AND Gate General Description Features The LVQ08 contains four, 2-input AND gates. • Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and

ir1010

Abstract: 74LVQ08 74LVQ08SC 74LVQ08SJ M14A M14D
Contextual Info: E M IC O N D U C T Q R t 74LVQ08 Low Voltage Quad 2-Input AND Gate G en eral D escrip tio n F e a tu re s The LVQ08 contains four, 2-input AN D gates. • Ideal for low pow er/low noise 3.3V applications ■ Guaranteed sim ultaneous sw itching noise level and

74LVQ08

Abstract: 74LVQ08M 74LVQ08MTR 74LVQ08TTR TSSOP14
Contextual Info: 74LVQ08 LOW VOLTAGE CMOS QUAD 2-INPUT AND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.6 ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V

74LVQ08

Contextual Info: 74LVQ08 QUAD 2-INPUT AND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5 ns TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING

74LVQ08

Abstract: 74LVQ08SC 74LVQ08SCX 74LVQ08SJ 74LVQ08SJX M14A M14D
Contextual Info: 74LVQ08 Low Voltage Quad 2-Input AND Gate General Description Features The LVQ08 contains four 2-input AND gates Y Y Y Y Y Ideal for low power low noise 3 3V applications Guaranteed simultaneous switching noise level and dynamic threshold performance Guaranteed pin-to-pin skew AC performance

74LVQ08

Abstract: 74LVQ08MTR 74LVQ08TTR TSSOP14
Contextual Info: 74LVQ08 LOW VOLTAGE CMOS QUAD 2-INPUT AND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.6 ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V

74LVQ08

Abstract: KHN 10 74LVQ08M 74LVQ08T TSSOP14
Contextual Info: SGS-THOMSON 74LVQ08 M IM i[Li gïïlHΩiD(3S Q UAD 2-IN PU T AND GATE . HIGH SPEED: tPD = 5 ns (TYP.) at V Cc =3.3V . COMPATIBLE WITH TTL OUTPUTS . LOW POWER DISSIPATION: Icc = 2 |xA (MAX.) at T a = 25 °C . LOW NOISE: V o lp = 0.3 V (TYP.) at V Cc = 3.3V

5555 FAIRCHILD optocoupler

Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference

SO14

Abstract: TSSOP14 SO-14 TSSOP-14 TSSOP16 TSSOP-16 74LVQ02 74LVQ04 74LVQ125 74LVQ14
Contextual Info: LOGIC CIRCUITS LOW VOLTAGE HIGH SPEED CMOS - LVQ 74LVQ SERIES FEATURES Symbol VCC VI TA IOL tpd Parameter Supply Voltage Input Voltage Operating Temperature 74 Series Output Current Propagation Delay time @ VCC = 3.3V Value Unit 3.0 to 3.6 0 to VCC – 40 to 85

Contextual Info: ALPHANUMERICAL INDEX LCX FAMILY Type Number Function Package Page Number 51 74LCX00 Quad 2-Input NAND Gate with 5V Tolerant Input TSS0P/S014 74LCX02 Quad 2-Input NOR Gate with 5V Tolerant Input TSS0P/S014 57 74LCX04 Hex Inverter with 5V Tolerant Input TSS0P/S014

FQPF*7N65C APPLICATIONS

Abstract: bc548 spice model bf494 spice model spice model bf199 LM3171 BC517 spice model bc547 spice model BF494 spice MOC3043-M spice model SPICE model BC237
Contextual Info: Fairchild PSG.book Page i Wednesday, July 28, 2004 11:12 AM Fairchild Semiconductor Product Catalog Rev. 1 Analog & Mixed Signal Discrete Power Interface & Logic Microcontrollers Optoelectronics RF Power Front Matter.fm Page ii Monday, August 2, 2004 10:09 AM