74LVG Search Results
74LVG Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: Philips Semiconductors Preliminary specification 16-bit edge triggered D-type flip-flop with 74LVG162374A 30Q series termination resistors; 3-State _ 74LVCH162374A FEATURES PIN CONFIGURATION • 5 volt tolerant inputs/outputs for interfacing with 5V logic |
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16-bit 74LVG162374A 74LVCH162374A 74LVCH162374A 74LVC 62374A | |
j3b1
Abstract: ltpz 74LVC623 74LVC623D 74LVC623DB 74LVC623PW
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74LVC623 74LVC623 j3b1 ltpz 74LVC623D 74LVC623DB 74LVC623PW | |
Contextual Info: Philips Semiconductors Preliminary Specification Octal buffer/line driver with 5-volt tolerant Inputs/outputs; damping resistor; 3-state FEATURES • 5-Volt tolerant inputs/outputs, for interfacing with 5-vott logic. • Supply voltage range of 2.7 V to 3.6 V |
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LVCH241A 74LVC | |
74LVC162244A
Abstract: SCHMITT-TRIGGER 3 state 5v tolerant HEX SCHMITT-TRIGGER INVERTER SPICE 74LV74 74LVC377
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OT355-1 OT362-1 OT364-1 PLCC20: PLCC28: OT261-3 74LVC162244A SCHMITT-TRIGGER 3 state 5v tolerant HEX SCHMITT-TRIGGER INVERTER SPICE 74LV74 74LVC377 | |
SW300Contextual Info: Philips Semiconductors Product specification 16~bit edge triggered D-type flip-flop; 3-State FEATURES 74LVCH16374 PIN CONFIGURATION • Wide supply voltage range of 1.2 V to 3.6 V • Complies with JEDEC standard no. 8-1A 1ÖE 4 S | 1C P • CMOS low power consumption |
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74LVCH16374 74LVCHrformance. SW300 | |
BA 658 diagramContextual Info: Philips Semiconductors Product specification Octal transceiver/register with dual enable 3-State 'FEATURES 74LVC652 The 74LVC652 consist of 8 non-inverling bus transceiver circuits with 3-State outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the internal |
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74LVC652 74LVC652 BA 658 diagram | |
d2373Contextual Info: Philips Semiconductors Preliminary Specification Octal D-type transparent latch with 5-volt tolerant inputs/outputs; damping resistor; 3-state FEATURES • • • • • • • • 5-Volt tolerant inputs/outputs, for interfacing with 5-voit logic. Supply voltage range of 2.7 V |
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74LVC2373A 74LVCH2373A LVCH2373A d2373 | |
Contextual Info: Philips Semiconductors Preliminary Specification Octal buffer/line driver with 5-volt tolerant inputs/outputs; damping resistor; 3-state; inverting FEATURES • 5-Volt tolerant inputs/outputs, for interfacing with 5-volt logic. • Supply voltage range of 2.7 V |
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74LVC2240A 74LVCH2240A LVCH2240A 74LVC | |
Contextual Info: P h ilip s S e m ic o n d u c t o r s P re lim in a ry s p e c ific a t io n 16-bit bus transceiver with direction pin and 300 series termination resistors; 3-State FEATURES 74LVC162245A 74LVCH162245A PIN CONFIGURATION • 5 volt tolerant inputs/outputs for interfacing with 5V logic |
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16-bit 74LVC162245A 74LVCH162245A 74LVCH162245A 74LVC 62245A | |
Contextual Info: Philips Semiconductors Preliminary Specification Octal buffer/line driver with 5-volt tolerant inputs/outputs; 3-state FEATURES • • • QUICK REFERENCE DATA GND = 0 V; T ^ = 25°C; t, = t, < 2.5 ns Inputs can be driven from either 3.3 V or 5 V devices. In 3-state |
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LVCH541A 74LVC541A 74LVCH541A | |
Contextual Info: Philips Semiconductors Objective Specification 10-bit buffer/line driver with 5-volt tolerant 74LVC2827A m puts/out£Uts^am 2in^resistor^^tat^^^^^^^74LVCH2827A FEATURES • • • • • • • • QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; t. = t, < 2.5 ns |
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10-bit 74LVC2827A 74LVCH2827A LVCH2827A | |
LVCH22952A
Abstract: SSOP24 TSSOP24
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74LVC22952A 74LVCH22952A LVCH22952A 74LVC 2952A 711002b SSOP24 TSSOP24 | |
Contextual Info: LVQ273 National Semiconductor 74LVQ273 Low Voltage Octal D Flip-Flop General Description Features The LVQ273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset |
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LVQ273 74LVQ273 LVQ273 74LVG273 | |
Contextual Info: HD74LVC16373A-16-bit D-type Transparent Latches with 3-state Outputs Description The HD74LVC16373A has sixteen D type latches with three state outputs in a 48 pin package. When the latch enable input is high, the Q outputs w ill follow the D inputs. When die latch enable goes low, data at |
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HD74LVC16373A---------16-bit HD74LVC16373A S373A HD74ILVCl | |
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Contextual Info: IN TE G R A TE D C IRC UITS 74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Product specification IC 24 Data Handbook Philips Semiconductors 1998 Jun 17 PHILIPS Philips Semiconductors Product Specification Dual D -type flip -flo p w ith s e i and reset; |
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74LVC74A 74LVC74A | |
2374AD
Abstract: 2374A D 2374a
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74LVC2374A 74LVCH2374A LVCH2374A 2374AD 2374A D 2374a | |
74LVGContextual Info: LVQOO National Semiconductor 74LVQ00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVQOO contains four 2-input NAND gates. • Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dynamic threshold performance |
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74LVQ00 MIL-STD-883 74LVQ00SC 74LVQ00SCX 74LVQ00SJ 74LVQ00SJX 74LVG | |
Contextual Info: Philips Semiconductors Product Specification Octal D-type registered transceiver; 3-state FEATURES • • • • • DESCRIPTION The 74LVC543 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. |
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74LVC245 74LVC373 74LVC543 |