74LV165A Search Results

Contextual Info: 74LV165A 8-bit parallel-in/serial-out shift register Rev. 4 — 28 March 2014 Product data sheet 1. General description The 74LV165A is an 8-bit parallel-load or serial-in shift register with complementary serial outputs Q7 and Q7 available from the last stage. When the parallel-load input (PL) is

Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LV165A 8-bit parallel-in/serial-out shift register Product specification File under Integrated Circuits, IC24 2003 Feb 18 Philips Semiconductors Product specification 8-bit parallel-in/serial-out shift register FEATURES 74LV165A

Contextual Info: INTEGRATED CIRCUITS DAT 74LV165A 8-bit parallel-in/serial-out shift register Product specification 2003 Jul 23 Philips Semiconductors Product specification 8-bit parallel-in/serial-out shift register 74LV165A Schmitt-trigger action at all inputs makes the circuit

CP/2014

Contextual Info: 74LV165A-Q100 8-bit parallel-in/serial-out shift register Rev. 2 — 19 February 2014 Product data sheet 1. General description The 74LV165A-Q100 is an 8-bit parallel-load or serial-in shift register with complementary serial outputs Q7 and Q7 available from the last stage. When the parallel-load input (PL)

Contextual Info: 74LV165A 8-bit parallel-in/serial-out shift register Rev. 2 — 4 September 2013 Product data sheet 1. General description The 74LV165A is an 8-bit parallel-load or serial-in shift register with complementary serial outputs Q7 and Q7 available from the last stage. When the parallel-load input (PL) is

CP/2014

Contextual Info: 74LV165A-Q100 8-bit parallel-in/serial-out shift register Rev. 3 — 28 March 2014 Product data sheet 1. General description The 74LV165A-Q100 is an 8-bit parallel-load or serial-in shift register with complementary serial outputs Q7 and Q7 available from the last stage. When the parallel-load input (PL)

8-Bit shift register Parallel-IN Serial-OUT

Abstract: MNA993 74LV165A 74LV165AD 74LV165APW TSSOP16
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LV165A 8-bit parallel-in/serial-out shift register Product specification 2003 Jul 23 Philips Semiconductors Product specification 8-bit parallel-in/serial-out shift register FEATURES 74LV165A Schmitt-trigger action at all inputs makes the circuit

Contextual Info: 74LV165A-Q100 8-bit parallel-in/serial-out shift register Rev. 1 — 21 October 2013 Product data sheet 1. General description The 74LV165A-Q100 is an 8-bit parallel-load or serial-in shift register with complementary serial outputs Q7 and Q7 available from the last stage. When the parallel-load input (PL)

Contextual Info: 74LV165A 8-bit parallel-in/serial-out shift register Rev. 3 — 20 February 2014 Product data sheet 1. General description The 74LV165A is an 8-bit parallel-load or serial-in shift register with complementary serial outputs Q7 and Q7 available from the last stage. When the parallel-load input (PL) is

A115-A

Abstract: C101 LV165A SN54LV165A SN74LV165A SN74LV165APWRG3
Contextual Info: SN54LV165A, 74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402M − APRIL 1998 − REVISED DECEMBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on JESD 17 D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A

5555 FAIRCHILD optocoupler

Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference

Contextual Info: SN54LV165A, 74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402L − APRIL 1998 − REVISED MAY 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on JESD 17 D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A

lv165a

Contextual Info: SN54LV165A, 74LV165A www.ti.com SCLS402N – APRIL 1998 – REVISED JULY 2013 PARALLEL-LOAD 8-BIT SHIFT REGISTERS Check for Samples: SN54LV165A, 74LV165A FEATURES DESCRIPTION • • • The ’LV165A devices are parallel-load, 8-bit shift registers designed for 2-V to 5.5-V VCC operation.

Contextual Info: SN54LV165A, 74LV165A PARALLELĆLOAD 8ĆBIT SHIFT REGISTERS SCLS402K − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Ioff Supports Partial-Power-Down Mode

Contextual Info: SN54LV165A, 74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402M − APRIL 1998 − REVISED DECEMBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on JESD 17 D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A

Contextual Info: SN54LV165A, 74LV165A PARALLELĆLOAD 8ĆBIT SHIFT REGISTERS SCLS402K − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Ioff Supports Partial-Power-Down Mode

Contextual Info: SN54LV165A, 74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402K − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Ioff Supports Partial-Power-Down Mode Operation

Contextual Info: SN54LV165A, 74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402M − APRIL 1998 − REVISED DECEMBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on JESD 17 D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A

Contextual Info: SN54LV165A, 74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402H – APRIL 1998 – REVISED JANUARY 2003 SN54LV165A . . . J OR W PACKAGE 74LV165A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 3 14 4 13 5 12 6 11 7 10 8 9 VCC CLK INH D C B A SER QH CLK

Contextual Info: SN54LV165A, 74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402M − APRIL 1998 − REVISED DECEMBER 2010 D Latch-Up Performance Exceeds 250 mA Per D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D JESD 17

BUK2114

Abstract: BUK2114-50SYTS saa7117 SAA7136E MPSA92 168 saa7136 buk2914-50syts TDA8920BTH bu4508dx KMZ52
Contextual Info: Index Type number Page number 1N4148 34 1N4531 34 1N47xxA series 44 1PS10SB62 32 1PS10SB63 32 1PS10SB82 32 1PS181 36 1PS184 36 1PS193 34 1PS226 36 1PS59SB10 28 1PS59SB14 28 1PS59SB15 28 1PS59SB16 28 1PS59SB20 30 1PS59SB21 28 1PS66SB17 32 1PS66SB62 32 1PS66SB63

Contextual Info: SN54LV165A, 74LV165A www.ti.com SCLS402N – APRIL 1998 – REVISED JULY 2013 PARALLEL-LOAD 8-BIT SHIFT REGISTERS Check for Samples: SN54LV165A, 74LV165A FEATURES DESCRIPTION • • • The ’LV165A devices are parallel-load, 8-bit shift registers designed for 2-V to 5.5-V VCC operation.

Contextual Info: SN54LV165A, 74LV165A PARALLELĆLOAD 8ĆBIT SHIFT REGISTERS SCLS402K − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Ioff Supports Partial-Power-Down Mode

74lv165a

Abstract: lv165a A115-A C101 SN54LV165A SN74LV165A SN74LV165ARGYR LV165
Contextual Info: SN54LV165A, 74LV165A PARALLELĆLOAD 8ĆBIT SHIFT REGISTERS SCLS402K − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Ioff Supports Partial-Power-Down Mode