MNA993 Search Results

Contextual Info: NSL002 8-bit parallel-in/serial out shift register Rev. 1 — 22 January 2013 Product data sheet 1. General description The NSL002 is an 8-bit parallel-load or serial-in shift registers with complementary serial outputs Q7 and Q7 available from the last stage. When the parallel load (PL) input is

74HC165

Abstract: 74HC165N MNA993 74HC165 logic diagram 74HC165D 74HC165DB 74HCT165 74HCT165D 74HCT165DB 74HCT165N
Contextual Info: 74HC165; 74HCT165 8-bit parallel-in/serial out shift register Product data sheet 1. General description The 74HC165; 74HCT165 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .

Contextual Info: INTEGRATED CIRCUITS DAT 74LV165A 8-bit parallel-in/serial-out shift register Product specification 2003 Jul 23 Philips Semiconductors Product specification 8-bit parallel-in/serial-out shift register 74LV165A Schmitt-trigger action at all inputs makes the circuit

Contextual Info: 74LV165 8-bit parallel-in/serial-out shift register Rev. 5 — 9 September 2013 Product data sheet 1. General description The 74LV165 is an 8-bit parallel-load or serial-in shift register with complementary serial outputs Q7 and Q7 available from the last stage. When the parallel-load input (PL) is

74HC165BQ

Abstract: 74HC165D 74HC165 74HC165DB 74HC165N 74HCT165 74HCT165D 74HCT165DB 74HCT165N JESD22-A114E
Contextual Info: 74HC165; 74HCT165 8-bit parallel-in/serial out shift register Product data sheet 1. General description The 74HC165; 74HCT165 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .

Contextual Info: 74LV165 8-bit parallel-in/serial-out shift register Rev. 4 — 30 August 2013 Product data sheet 1. General description The 74LV165 is an 8-bit parallel-load or serial-in shift register with complementary serial outputs Q7 and Q7 available from the last stage. When the parallel-load input (PL) is

Contextual Info: 74LV165A 8-bit parallel-in/serial-out shift register Rev. 2 — 4 September 2013 Product data sheet 1. General description The 74LV165A is an 8-bit parallel-load or serial-in shift register with complementary serial outputs Q7 and Q7 available from the last stage. When the parallel-load input (PL) is

CP/2012

Contextual Info: 74HC165-Q100; 74HCT165-Q100 8-bit parallel-in/serial out shift register Rev. 1 — 17 July 2012 Product data sheet 1. General description The 74HC165-Q100; 74HCT165-Q100 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky

8-Bit shift register Parallel-IN Serial-OUT

Abstract: MNA993 74LV165A 74LV165AD 74LV165APW TSSOP16
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LV165A 8-bit parallel-in/serial-out shift register Product specification 2003 Jul 23 Philips Semiconductors Product specification 8-bit parallel-in/serial-out shift register FEATURES 74LV165A Schmitt-trigger action at all inputs makes the circuit

74hc165 datasheet

Abstract: hct165 74hc165 74HC165N 74HC165 Logic Family Specifications 74HCT165 74HC165BQ 74HC165D NXP 74HC family characteristics 74HCT165D
Contextual Info: 74HC165; 74HCT165 8-bit parallel-in/serial out shift register Rev. 03 — 14 March 2008 Product data sheet 1. General description The 74HC165; 74HCT165 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .

74hc165 so16

Abstract: CP/2012
Contextual Info: 74HC165-Q100; 74HCT165-Q100 8-bit parallel-in/serial out shift register Rev. 1 — 17 July 2012 Product data sheet 1. General description The 74HC165-Q100; 74HCT165-Q100 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky

74hc165

Abstract: 74HCT165P
Contextual Info: 74HC165; 74HCT165 8-bit parallel-in/serial out shift register Rev. 03 — 14 March 2008 Product data sheet 1. General description The 74HC165; 74HCT165 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .

Contextual Info: 74LV165-Q100 8-bit parallel-in/serial-out shift register Rev. 1 — 11 November 2013 Product data sheet 1. General description The 74LV165-Q100 is an 8-bit parallel-load or serial-in shift register with complementary serial outputs Q7 and Q7 available from the last stage. When the parallel-load input (PL)

Contextual Info: 74LV165A-Q100 8-bit parallel-in/serial-out shift register Rev. 1 — 21 October 2013 Product data sheet 1. General description The 74LV165A-Q100 is an 8-bit parallel-load or serial-in shift register with complementary serial outputs Q7 and Q7 available from the last stage. When the parallel-load input (PL)