74LS32 PIN Search Results

74LS32 pin configuration

Abstract: pin configuration logic symbol 74LS32 pin configuration 74LS32 74LS32 function table logic symbol 74LS32 74LS32 pin configuration and logic symbol 74LS32 74LS32 configuration 74LS32 NOT gate 74LS32 PIN
Contextual Info: GD54/74LS32 QUADRUPLE 2-INPUT POSITIVE OR GATES Description Pin Configuration This device contains four independent 2-input_OR gates. It performs the Boolean functions Y = A- B or Y = A + B in positive logic. . OUTPUT A B Y L H L L L H H H L H H H 4A 13 12

specifications of IC 7432 supply voltage

Abstract: 7432 pin configuration 7432 or gate ic IC 7432 74LS 7432 7432 ic or ic 7432 IC TTL 7432 IC 7432 for or gate Fanout value of IC 7432
Contextual Info: Signetics I 7432, LS32, S32 Gates Quad Two-Input OR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 4ns 28mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5%; Ta = 0°C to +70°C

ic ttl 7432

Abstract: specifications of IC 7432 supply voltage IC 7432 ls 7432 IC pin configuration ttl 7432 TTL 7432 OR propagation delay 7432 or gate ic 7432 ic 74LS32 SIGNETICS 7432 pin configuration
Contextual Info: 7432, LS32, S32 Gates Signetics Quad Two-Input OR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 4ns 28mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5%: T a = 0°C to +70°C

Contextual Info: GD54/74LS32 QUADRUPLE 2-INPUT POSITIVE OR GATES Description Pin Configuration This device contains four independent 2-input O R gates. It performs the Boolean functions Y = Â- B or Y = A + B in positive logic. Vcc 14 4B 13 4A 4Y 12 11 A B O U TP U T Y L L

74LS32 function table

Contextual Info: GD54/74LS32 QUADRUPLE 2-INPUT POSITIVE OR GATES Description Pin Configuration This device contains four independent 2-input OR gates. It performs the Boolean functions V = Â • B or Y = A + B in positive logic. Vcc 14 4B 13 4A 12 4Y 11 38 10 3A 3Y 9 8 [¿-I

IC 74LS32

Abstract: IC 7432 7432 or gate ic 74LS32 fan-out 74LS32PC 74LS32P 74LS32 OR IC 74LS32 Quad 2-Input OR Gate 7432PC IC 7432 for or gate
Contextual Info: •' NATIONAL SEHICOND {LOGICI OEE 3 | b S O U E Z D0t3fc,bS 3 | T-vj-/r 32 CONNECTION DIAGRAM PINOUT A 54/7432 54S/74S32 54LS/74LS32 QUAD 2-INPUT OR GATE ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%, T a = 0°C to +70° C

ttl 7432

Abstract: 7432 ttl 7432 pin configuration 7432 signetics 74LS 7432 TTL 7432 OR propagation delay 74LS32 specification and configuration logic symbol 74LS32 pin configuration and logic symbol 74LS32 pin configuration of 7432
Contextual Info: 7432, LS32, S32 Signetics Gates Quad Two-Input OR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 4ns 28mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; TA = 0°C to + 70°C

74ls32 equivalent

Abstract: IC 74LS32 SPECIFICATIONS 74LS32 fan-out ttl 7432 7432 pin configuration specifications of IC 74ls32 supply voltage
Contextual Info: Signetics I 7432, LS32, S32 Gates Quad Two-Input OR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 4ns 28mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; T a = 0°C to +70°C

pin DIAGRAM OF IC 74ls32

Abstract: cmos 74ls32 of IC 74LS32 2099A 74LS32 power dissipation IC 74LS32 74ls32 equivalent LC74HC32M 74LS32 pinout
Contextual Info: SANYO SEMICONDUCTOR CORP 1HE D I 7Ti7Q7Li □ □QSt.47 û T ~ -^ V 2 .1 CMOS High-Speed Standard Logic LC74HC Series 3034A Quad 2-Input OR Gate £2099A Features • The LC74HC32M consists of 4 identical 2*input OR gates. • Uses CMOS silicon gate process technology to achieve operating speeds similar to LS.TTL 74LS32 w ith the

ttl 7432

Abstract: 7432 pin configuration TTL 74ls LS32 7432 TTL pin configuration logic symbol 74LS32 74LS32 specification and configuration 7432 7432 signetics TTL 7432 NOT propagation delay ttl 7432 or
Contextual Info: S ig n e lics I 7 4 3 2 , LS 3 2 , S32 Gates Quad Two-Input OR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19m A 74LS32 14ns 4.0m A 74S 32 4ns 28m A ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; T a = 0°C to +70°C

L3003A

Contextual Info: SANYO' SEM IC ON DU CT OR CORP 15E I I 7=1170 7 b 0D Q 2b4M E C M O S H igh-Speed Standard Logic LC 74H C Series 3003A Quad 2 -Input OR Gate 1734B Features • The LC74HC32 consists o f 4 identical 2-inp u t OR gates. • Uses CMOS silicon gate process technology to achieve operating speeds similar to LS’T T L 74LS32) w ith the

1734B

Abstract: IC 74ls32 74LS32 LC74HC32 pin DIAGRAM OF IC 74ls32
Contextual Info: SANYO' SEM IC ON DU CT OR CORP 15E I I 7=1170 7 b 0D Q 2b4M E C M O S H igh-Speed Standard Logic LC 74H C Series 3003A Quad 2 -Input OR Gate 1734B Features • The LC74HC32 consists o f 4 identical 2-inp u t OR gates. • Uses CMOS silicon gate process technology to achieve operating speeds similar to LS’T T L 74LS32) w ith the

IC 74ls32

Abstract: pin DIAGRAM OF IC 74ls32 74ls32 pin out of IC 74LS32 74LS32 Quad 2-Input OR Gates 74ls32 equivalent 74LS32 power dissipation TTL 74ls32 74LS series logic gates 3 input or gate 74LS32 PIN
Contextual Info: S A NYO SEMICONDUCTOR CORP 1HE D I 7Ti7Q 7Li □ □QSt.47 û T ~ -^ V 2 .1 C M O S H igh-Speed Standard Logic LC 74H C Series 3034A Quad 2-Input OR Gate £2099A Features • The L C 7 4 H C 3 2 M consists of 4 identical 2*input O R gates. • Uses C M O S silicon gate process technology to achieve operating speeds sim ilar to L S .T T L 74LS32 w ith the

JM38510/01405BEA

Abstract: SN54LS32J M38510
Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 5962-9557401QCA ACTIVE CDIP

SN74LS32N

Abstract: JM38510/01405BEA M38510
Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) 5962-9557401QCA ACTIVE CDIP J

I8051

Abstract: 74LS221 pin configuration of 74ls32 HEADER 10X2 74LS32 pin configuration JTAG header 10x2 Connector 74ls32 datasheet b14 mot JTAG header 10x2 datasheet Connector 74LS240
Contextual Info: LXD380 — Evaluation Board for Octal E1 Applications Developer Manual January 2001 As of January 15, 2001, this document replaces the Level One document LXD380 — Evaluation Board for Octal E1 Applications User Guide. Order Number: 249212-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

LS32

Abstract: JM38510/01405BEA M38510
Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) 5962-9557401QCA ACTIVE CDIP J

I8051

Abstract: IBM R61 display JTAG header 10x2 datasheet Connector LXT384 LXD384 74ls32 datasheet 74LS221 74LS240 74LS32 DIN 4102 B1
Contextual Info: LXD384 — Evaluation Board for Octal T1/E1 Applications Developer Manual January 2001 As of January 15, 2001, this document replaces the Level One document LXD384 — Evaluation Board for Octal T1/E1 Applications User Guide. Order Number: 249214-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

7411 pin diagram

Abstract: TTL 7408 DS 7409 74LS574 CI 7408 7407 connection diagram 74LS386 TTL 7408 DIAGRAMS 74LS08 PIN CI 74LS08
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D93 54LS/74LS379 D94 9386, 74LS266, 54LS/74LS386 D95 54LS/74LS398 r ei fi r E5i r?i n Vcc 1 4 5 12 13 4 5 7 6 14 15 17 16 lOa Ila lo b lib lo c lie lo d lid S CP Qa Qb 2 GND Vcc = Pin 20 GND = Pin 10 Vcc = Pin 16

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 24-Jan-2013 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) 5962-9557401QCA ACTIVE CDIP J

I8051

Abstract: Intel 8081 BN14 HEADER 10X2 T2D 17 67 74LS32 74LS221 74ls32 datasheet i8051 microcontroller diode t2d
Contextual Info: LXD386 — Evaluation Board for Quad T1/E1 Applications Developer Manual January 2001 As of January 15, 2001, this document replaces the Level One document LXD386 — Evaluation Board for Quad T1/E1 Applications User Guide. Order Number: 249215-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

Connecting ethernet interface with LPC2000

Abstract: 20F001N RTL8019AS Realtek RTL8019AS RTL8019AS applications note rt8019 RT8019AS REALTEK 8019 AS RTL8019 AN10403
Contextual Info: AN10403 Connecting ethernet interface with LPC2000 Rev. 01 — 7 February 2007 Application note Document information Info Content Keywords ARM, LPC2000, Ethernet, RTL8019 Abstract This application note describes how to connect Ethernet interface with NXP LPC2000 series ARM MCU. Reference schematics and Ethernet

74LS32 noise immunity

Abstract: 74LS32 truth table
Contextual Info: TOSHIBA TC74HC32AP/AF/AFN Quad 2-Input or Gate The TC74HC32A is a high speed CMOS2-INPUT OR GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

74LS32 and gate

Abstract: 16NS25
Contextual Info: TOSHIBA TC74HCT32AP/AF Quad 2-Input or Gate The TC74HCT32A is a high speed CMOS 2-INPUT OR GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.