74LS293 PIN Search Results

ls290

Abstract: LS293 74LS290 74LS293 Asynchronous counter 74LS293 Asynchronous counter datasheet 74LS293 pin 74LS293 751A-02 LS90 LS93
Contextual Info: SN54/74LS290 SN54/74LS293 DECADE COUNTER; 4-BIT BINARY COUNTER The SN54 / 74LS290 and SN54 / 74LS293 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five LS290 or divide-by-eight (LS293) section

74ls290

Abstract: LS290 74LS293 751A-02 LS293 LS90 LS93 74LS293 Asynchronous counter
Contextual Info: SN54/74LS290 SN54/74LS293 DECADE COUNTER; 4-BIT BINARY COUNTER The SN54 / 74LS290 and SN54/ 74LS293 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five LS290 or divide-by-eight (LS293) section

Contextual Info: Signetics 74LS293 Counter 4-Bit Binary Ripple Counter Product Specification Logic Products DESCRIPTION The '293 is a 4-bit ripple type binary counter. The device consists of four master-slave flip-flops internally con­ nected to provide a divide-by-two sec­

sn 7492 ttl

Abstract: 74293 pin diagram TTL 7493A TTL 74293 7493A 74162 74LS93 74293 74LS183 74LS90
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D121 54/7490A, 54LS/74LS90 D122 54/7492, 74LS92 D123 S4/74293, 54LS/74LS293 6 7 141 Vcc = Pin 5 GND = Pin 10 NC = Pin 4,13 - Vcc = Pin 5 GND = Pin 10 NC = 2, 3, 4, 13 D124 S4/7493A, 54LS/74LS93 D125 54/74176, 54/74177,

74LS293 Asynchronous counter

Contextual Info: 74LS293 Signetics Counter 4-Bit Binary Ripple Counter Product Specification Logic Products DESCRIPTION The '293 is a 4-bit ripple type binary counter. The device consists of tour master-slave flip-flops internally con­ nected to provide a divide-by-two sec­

kcd3

Abstract: 74LS293 pin 74LS293 Asynchronous counter 74LS293 SVR05 N74LS293D 04BD 74LS N74LS293N
Contextual Info: Signetics 74LS293 Counter 4-Bit Binary Ripple Counter Product Specification Logic Products DESCRIPTION The '293 is a 4-bit ripple type binary counter. The device consists of four master-slave flip-flops internally con­ nected to provide a divide-by-two sec­

CI 74LS90

Abstract: ci 74193 ci 74ls193 CI 74196 ci 7492 CI 74176 74LS93 TTL 74293 TTL 7493A sn 7492 ttl
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIG ITAL-TTL D121 54/7490A, 54LS/74LS90 D122 54/7492, 74LS92 D123 S4/74293, 54LS/74LS293 6 7 141 Vcc = Pin 5 GND = Pin 10 NC = Pin 4,13 - Vcc = Pin 5 GND = Pin 10 NC = 2, 3, 4, 13 D124 S4/7493A, 54LS/74LS93 D125 54/74176, 54/74177,

74LS293 Asynchronous counter

Abstract: 74LS293 3 bit ripple counter
Contextual Info: 74LS293 Counter 4-Bit Binary Ripple Counter Product Specification Logic Products DESCRIPTION The '293 is a 4-bit ripple type binary counter. The device consists of four master-slave flip-fiops internally con­ nected to provide a divide-by-two sec­ tion and a divide-by-eight section. Each

74LS293 Asynchronous counter

Abstract: 54ls293 74LS293 74LS293 pin 74LS N74LS293D N74LS293N
Contextual Info: Signetics 74LS293 Counter 4-Bit Binary Ripple C ounter Product Specification Lo g ic P rod ucts DESCRIPTION The '293 is a 4-bit ripple type binary counter. The device consists o f four master-slave flip-flops internally con­ nected to provide a divide-by-two sec­

74LS293 Asynchronous counter

Contextual Info: 74LS293 Counter Signetics 4-Bit Binary Ripple Counter Product Specification Logic Products DESCRIPTION T h e ’2 9 3 is a 4-bit ripple type binary counter. Th e device consists of four m aster-slave flip-flops internally co n ­ nected to provide a divide-by-two sec­

74LS190 pins

Abstract: 74LS192 PIN diagram 74LS183 TTL 74ls163 74LS192 pins Synchronous 74163 74LS161 74160 74LS162 74LS191 pins
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L-T T L D121 54/7490A, 54LS/74LS90 D122 54/7492, 74LS92 D123 S4/74293, 54LS/74LS293 6 7 141 Vcc = Pin 5 GND = Pin 10 N C = Pin 4,13 - Vcc = Pin 5 GND = Pin 10 N C = 2, 3, 4, 13 D124 S4/7493A, 54LS/74LS93 D125 54/74176, 54/74177,

ls293

Contextual Info: SN74LS290 DECADE COUNTER; 4-BIT BINARY COUNTER The SN54/74LS290 and SN54/74LS293 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five LS290 or divide-by-eight (LS293) section which are triggered by a

74ls290

Abstract: IC 74ls290
Contextual Info: MOTOROLA SN54/74LS290 SN54/74LS293 DECADE COUNTER; 4-BIT BINARY COUNTER The SN 54/74LS 290 and S N 54/74LS 293 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two sec­ tion and either a divide-by-five LS290 or divide-by-eight (LS293) section

74LS183

Abstract: 74LS193 sn 7492 ttl TTL 74293 TTL 7490 54LS TTL 74LS93 74ls90 74LS93 ttl 7493
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L-T T L D121 54/7490A, 54LS/74LS90 D122 54/7492, 74LS92 D123 S4/74293, 54LS/74LS293 6 7 141 V cc = Pin 5 G N D = Pin 10 N C = Pin 4 ,1 3 - V cc = Pin 5 G N D = Pin 10 N C = 2, 3, 4, 13 D124 S4/7493A, 54LS/74LS93

Contextual Info: g MOTOROLA SN54/74LS290 SN54/74LS293 DECADE COUNTER; 4-BIT BINARY COUNTER The S N 54/74LS 290 and S N 54/74LS 293 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two sec­ tion and either a divide-by-five (LS290) or divide-by-eight (LS293) section

74293 counter

Abstract: 74LS293 Asynchronous counter 74293 74293DC
Contextual Info: 293 / CO NNECTIO N DIAGRAM PINOUT A ^^D , l/54/74293 t >1d " , v' 54LS/74LS293 C11Ö ’ >T T MODULO-16 BINARY COUNTER n c [T Vcc nc [T T 3] MR2 n c [7 ÏT ]C P i Qi | T TÖJCPo [T T ]Q o GND [ 7 T]q 3 n c DESCRIPTION — The ’293 is a 4-stage ripple counter containing a high

74293 counter

Abstract: 74293 counter 8 PINS 74LS293FC U2-14 74LS293PC
Contextual Info: NATIONAL SEMICOND -CLOGIC} DEE D I bSGliaa □□bBTTD E I 293 T-</S-23-/3 CONNECTION DIAGRAM PINOUT A 54/74293 54LS/74LS293 MODULO-16 BINARY COUNTER n c [T 14] Vcc n c [T ]T ]m r2 nc DESCRIPTION — The '293 is a 4-stage ripple counter containing a high speed flip-flop acting as a divide-by-two and three flip-flops acting as a

ls293

Contextual Info: g MOTOROLA SN54LS/74LS290 SN54LS/74LS293 D E S C R IP T IO N — The S N 54 L S /7 4 L S 29 0 and S N 54 L S /7 4 L S 29 3 are high-speed 4 -b it ripple type counters partitioned into tw o sections. Each counter has a divide-by-tw o section and either a divide-by-five (LS290) or

ls293

Abstract: LS29 74LS293 Asynchronous counter
Contextual Info: M O T Y M O L A SN54/74LS290 SN54/74LS293 D E S C R I P T I O N — The S N 5 4 L S /7 4 L S 2 9 0 and S N 5 4 L S /7 4 L S 2 9 3 are high-speed 4 -bit ripple type counters partitioned into tw o sections. Each counter has a divide-by-tw o section an d either a divide-by-five LS290 or

74293 counter

Abstract: 74293 pin diagram 74293 74293 counter 8 PINS 74LS293 Asynchronous counter pin diagram of 74293 74293PC MODULO-16 74LS293PC 54293DM
Contextual Info: 293 C O N N E C T IO N D IA G R A M P IN O U T A c^ O , 54/74293 t> 1 ù ' r 3 > v' 54LS/74LS293 O I 0 5 [T NC [T T T NC MODULO-16 BINARY COUNTER nc 101 Vcc Î 3IMR2 ill MRi ÏT]CPi 101 CPo j]O o T]Q3 [T Û2 [T Qi [T NC [ s GND D E S C R IP T IO N — T he ’293 is a 4-stage rip p le c o u n te r c o n ta in in g a high

Contextual Info: m o to r o la SN54LS/74LS290 SN54LS/74LS293 D E S C R I P T I O N — T h e S N 5 4 L S / 7 4 L S 2 9 0 a n d S N 5 4 L S / 7 4 L S 2 9 3 are h ig h -s p e e d 4 -b it ripple type c o u n te rs partitioned into t w o se ction s. E a ch co u n te r h a s a d iv id e -b y-tw o s e ctio n a n d e it h e r a d iv id e -b y -f iv e L S 2 9 0 o r

TTL 74293

Abstract: 74290 7490A 74LS93 74196 TTL 93S62 7493A 93S43 D114 D116
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D115 93S43 D114 9344 7 1» 18 6 5 4 Vcc = Pin 24 GND = Pin 12 NC = Pin 1, 2, 3, 13 8 1 19 18 17 16 Vcc = Pin 24 GND = 12 D117 93S62 D116 54/74180 8 3 S 23 22 21 20 4 10 11 12 13 1 1 2 2 3 4 10 11 12 13 5 lO h

74LS93 P

Abstract: TTL 74LS93 74293 pin diagram 74LS78 TTL 74293 74176 74293 74LS490 74LS93 74LS373
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIG ITAL-TTL D82 54LS/74LS78 D81 54LS/74LS541 V cc |S5| RSj FSI F7| F»l FS1 j b j j j F5I Fä| FI j j j SD SD J Q J C CP Q — e Q 5— 9 CP K >— 12 Q K CD CD LlI lil LiJ Lil LiTIU LzJ LlI üü bsJ QNO 9 3 4 li 5 D85

74LS160

Abstract: Synchronous 74163 74LS190 pins 74192 74LS193 74LS192 pins 74LS191 pins Fairchild 74190 D129 93S16
Contextual Info: FAIRCHILD DIGITAL TTL I Max Clock Rate MHz Typ Clock to Q Output Delay-ns (Typ) Power Dissipation mW (Typ) Logic/Connection Diagram Package(s) 1 Synchronous 93L16 16 Presettable S _r 23 26 85 D127 4L,7B,9B 2 \/ Synchronous 93S16 1/ 16 Presettable S _r 90