74LS195 REGISTER DIAGRAM Search Results

7494

Abstract: 7495 shift register cI 74150 ci 7495 74195 shift register 74179 74195 ttl 7495 74195 TTL shift register D164
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D163 9300, 93H00, 93L00, 93S00, 54/74195, 54LS/74LS195 0162 54/74150 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 24 GND = Pin 12 D164 93H72 D166 54/7495, 54LS/74LS95, 54LS/74LS95B D165 54/7494 1 16 2 14 3 13 4 11 P i A P2A Pi QP2B P1CP2C Pi D P2D

cI 74150

Abstract: 00105013 74179 ci 7495 74LS95 93L00 TTL 74150 ttl 7495 93H00 93H72
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D163 9300, 93H00, 93L00, 93S00, 54/74195, 54LS/74LS195 0162 54/74150 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 24 GND = Pin 12 D164 93H72 D166 54/7495, 54LS/74LS95, 54LS/74LS95B D165 54/7494 1 16 2 14 3 13 4 11 P i A P2A Pi QP2B P1CP2C Pi D P2D

74LS574

Abstract: ttl 74LS173 74ls399 93L38 ttl 74165 ttl 7491 54LS 74LS266 ttl 74173 74LS568
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D93 54LS/74LS379 D94 9386, 74LS266, 54LS/74LS386 D95 54LS/74LS398 Vcc 1 4 5 12 13 4 5 7 6 14 15 17 16 lOa Ila lob lib lo c lie lod lid r ei fi r E5i r?i n S CP Qa Qb 2 GND Vcc = Pin 20 GND = Pin 10 Vcc = Pin 16

ttl 74LS173

Abstract: 74187 ttl 74173 X1825 74LS502 ttl 7491 ttl 7497 D187 93L38 D190
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D187 9397, 7497 D188 93167, 74167 0189 54LS/74LS173 9 10 14 15 k h 12 Ü 13 IE 11 — 0 CE 9 - CP 10— 0 Ez 1 2 - Gy TC OE Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8 D190 54LS/74LS375 15 1 ,1 5 -

7491

Abstract: 7491 fairchild TTL 7491 74166 pin diagram shift register 7491 93L38 54LS 74LS574 93L28 D177
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D177 9328, 93L28 D178 54/7491 D179 54LS/74LS573 2 Da Qh - 13 CP Oh - 14 3 4 5 6 Do D i D2 Da D4 7 Ds De D? 1 1 - LE 1 “O OE Oo Q i Û2 O s 04 0 5 Oe Q? I 1I I I I I I 19 18 17 16 15 14 13 12

74164 14 PIN DIAGRAM

Abstract: 74LS165 74198 ttl 74165 74166 93L38 74165 pin diagram 74194 shift register D171 D172
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D170 54/74199 23 3 5 7 9 D171 54LS/74LS295, 54LS/74LS295A 6 16 18 20 22 2 3 4 D172 54/74194, 54S/74S194, 54LS/74LS194 5 2 li 3 4 5 6 7 PE Po Pi P2 P3 P4 P5 P6 P 7 J K := D > CP MR Qo Q l Û 2 Û3 O 4 Os 06 O 7

K D S 4L

Abstract: ttl 74LS173 ttl 74165 ttl 74166 74ls399 93L38 74170 74LS165 TTL 74ls195 54LS
Contextual Info: FAIRCHILD DIGITAL TTL 54LS 3 74LS574 8 8S P a ra lle l-in /S e ria l-o u t 54/7494 4 D 4S 4 P a ra lle l-in /S e ria l-o u t 54/74165 8 D 8A 35 20 37 D96 _r 55 20 135 D97 9Z 10 25 175 D165 4L,7B,9B 26 19 210 D175 4L,7B,9B 35 20 360 D176 4L,7B,9B 40 19 105

7475 D flip-flop

Abstract: quad D flip-flop 74175 pin 4 bit shift register 7494 pin diagram latch 74ls574 7477 D latch 74174 shift register 9374 74LS173 4 bit 3 state quad register 74LS279 D flip-flop 74175 pin
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T TL 7 1 2 6 3 5 i Ao A R BO a A 2 b A 3 e d 1 E l RBI e 13 12 11 10 E 9 f 9 15 3 2 4 m l 14 6 m Do M R TTTTTTTT 4 D147 54/74279, 54LS/74LS279 0146 9314, 93L14 D145 9370, 9374 So Qo 7 11 Da $3 V cc iwiEiEi[i3ii«inF5if»i

pin DIAGRAM OF IC 74ls195

Abstract: IC 74LS195 74LS195 truth table
Contextual Info: SGS-THOMSON l^Q ® I[LI©Tf®(Q iQ©i M54HC195 M74HC195 4 BIT PIPO SHIFT REGISTER m HIGH SPEED tpD = 14 ns (TYP.) at VCc = 5V • LOW POWER DISSIPATION ICC = 4 fiA (MAX.) at Ta = 25°C 6V ■ HIGH NOISE IMMUNITY VNIH = V|n|IL = 28% Vcc (MIN) ■ OUTPUT DRIVE CAPABILITY

74HC195

Abstract: 74HC195 timing chart data 74HC195 54HC 74HC M54HC195 M74HC195 74LS195 truth table pin DIAGRAM OF IC 74ls195
Contextual Info: I1 M54HC195 M74HC195 SGS -THOMSON K D [^©^LEl gir^@Ri]ö(gS 4 BIT PIPO SHIFT REGISTER HIGH SPEED tPD = 14 ns (TYP. at VCc = 5V LOW POW ER DISSIPATION |c c = 4 iiA (MAX.) at TA = 2 5 °C 6V HIGH NOISE IM M UN ITY V n ih = V n il = 28»/o Vcc(M IN ) O UTPU T DRIVE CAPABILITY

Contextual Info: 54 195 74 195 SCS-THOMSON HLHÈTTmo^i M HC M HC 4 BIT PIPO SHIFT REGISTER • HIGH SPEED tpD = 14 ns TYP. at VCc = 5V ■ LOW POWER DISSIPATION lcc = 4 pA (MAX.) at TA = 25°C 6V ■ HIGH NOISE IMMUNITY V n i h = V nil = 28»/o Vcc(MIN) ■ OUTPUT DRIVE CAPABILITY

74LS195 truth table

Contextual Info: 5bE D • 7^537 ODHOOaa 77T MSiSTH_ SCS-THOM SON tH Tls! ö liSD@S M54HC195 M74HC195 S-THOMSON T - H i- O f- O 4 BIT PIPO SHIFT REGISTER ■ HIGH SPEED tPD = 14 ns (TYP.) at V c c = 5V ■ LOW POWER DISSIPATION |cc = 4 pA (MAX.) at TA = 25°C 6V

Contextual Info: rr7 SGS-THOMSON “ 7# «Mi[L[i ÏÏG»fl gS M54HC195 M74HC195 8 BIT PIPO SHIFT REGISTER HIGHSPEED = 13 ns (TYP. at Vcc = 5 V LOW POWER DISSIPATION Ice = 4 nA (MAX.) at T a = 25 °C 6 V HIGH NOISE IMMUNITY V nih = Vnil = 28 % Vcc (MIN.) OUTPUT DRIVE CAPABILITY

M54HC195

Abstract: M54HC195F1R M74HC195 M74HC195B1R M74HC195C1R M74HC195M1R 74LS195 truth table 74HC195 timing chart
Contextual Info: M54HC195 M74HC195 8 BIT PIPO SHIFT REGISTER . . . . . . . . HIGH SPEED tPD = 13 ns TYP. at VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) at TA = 25 °C 6 V HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE

Contextual Info: g MOTOROLA SN54LST95A SN74LS195A DESCRIPTION — The S N 5 4 L S / 7 4 L S 1 9 5 A is a high speed 4-Bit Shift Register offering typical shift frequencies of 3 9 MHz. It is useful for a w ide variety of register and counting applications. It utilizes the

74HC19

Contextual Info: r z 7 S C S -T H O M S O N ÎÎ5 Î Î Î S 3 S S ü * M iy iO T « S M74HC195 8 BIT PIPO SHIFT REGISTEF • HIGHSPEED tpD = 13 ns TYP. at V cc = 5 V ■ LOW POWER DISSIPATION Icc = 4 nA (MAX.) at Ta = 25 °C 6 V ■ HIGH NOISE IMMUNITY Vnih = V n il = 28 % V cc (MIN.)

Contextual Info: TC74HC195AP/AF 4-BIT PIPO SHIFT REGISTER The TC74HC195A is a h ig h speed CMOS 4 -B IT S H IF T R E G IS T E R fa b ric a te d w ith silicon g ate C 2 MOS technology. It achieves the high speed o p eratio n s im ila r to equ iv alen t L ST T L w hile m a in ta in in g the CMOS low pow er

TC74HC195

Contextual Info: TC74HC195P/F TC74HC195P/F 4 - B I T PARALLEL S H IFT REGISTER The TC74HC195 i s a h ig h sp ee d CMOS 4-BIT SHIFT REGISTER f a b r i c a t e d w ith s i l i c o n g a te C2M0S te c h n o lo g y . I t a c h ie v e s th e h ig h sp ee d o p e r a t i o n s i m i l a r to e q u i v a l e n t

toshiba tc110g

Abstract: 74LS82 74ls150 74LS514 toshiba tc140g 74ls150 pin configuration 74LS273 SC11C1 diode sr45 74LS194 internal circuit diagram
Contextual Info: SIEMENS AKTIEN6ESELLSCHAF 47E » • BS3SbOS 0037405 7 » S I E G General Description Our Sea-of-Gates concept is based on a highperformance CMOS technology, in either 1.5 micron or 1.0 micron transistor gate length. This is equivalent to 1.1 or 0.8 micron effective

74LS82

Abstract: 74245 BIDIRECTIONAL BUFFER IC ic 4583 schmitt trigger core bit excess 3 adder using IC 7483 advantages for ic 7473 4 BIT COUNTER 74669 la 4508 ic schematic diagram XF107 74295 random number generator by using ic 4011 and 4017
Contextual Info: General Features The SCxD4 series of high performance CMOS gate arrays offers the user the ability to realise customised VLSI inte­ grated circuits featuring the speed performance previously obtainable only with bipolar technologies whilst retaining all the advantages of CMOS technology; low power consum p­

74ls82

Abstract: 74245 BIDIRECTIONAL BUFFER IC 74ls150 ph 4531 diode 4583 dual schmitt trigger ic D flip flop 7474 74245 BUFFER IC ic 7483 BCD adder data sheet ic 74139 Quad 2 input nand gate cd 4093
Contextual Info: General Features The SCxD4 series of high perform ance CM O S gate arrays offers the user the ability to realise custom ised VLSI inte­ grated circuits featuring the speed perform ance previously obtainable only with bipo lar tech nolog ies whilst retaining all

sidewinder force feedback

Abstract: micro servo 9g how to control sidewinder force feedback 2 7406 ic IC LM319 IC 74LS04 LMS 7805 ic LM339 5BA DIODE IC 74LS02
Contextual Info: Maintenance Manual CORPORATION SIDEWINDER Va" Streaming Cartridge Tape Drive M A IN TEN A N C E M A N U A L PART NUMBER 20109—001B COPYRIGHT 1982 ARCHIVE CORPORATION MAINTENANCE MANUAL SIDEWINDER TABLE OF CONTENTS Paragraph Title CHAPTER 1.1 1.2 1.2.1 1.2.2

Contextual Info: 5QE D 44^503 G01341Q 5 HITACHI/ L0GIC/ARRAYS/MÉÎ1 0 H IT A C H I S e p t e m b e r , 1985 CMOS GATE ARRAYS i HD61 SERIES DESIGNER'S MANUAL AND PRODUCT SPECIFICATION HITACHI/ LOGIC/ARR'A YS/MEM SQE D • 4 4TLS03 0G13411 4 T -42-11-09 CMOS GATE ARRAYS HD61 SERIES

ferranti ula

Abstract: pia 6820 yx 805 led driver IC CD 4440 cs pic RAM 2102 RADIO SHACK PARTS CROSS REF 74L73 8251 UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER yx 801 led driver 1702a eprom
Contextual Info: O <D & P o O o o ^ 0 3 1 0897-X $ 1 4.50 THE S-100 BUS HANDBOOK Dave Bursky H e r e ’s a c o m p re h e n s iv e b o o k th a t d is c u s s e s th e S -1 0 0 bus e q u ip m e n t an d h o w it is o rg a n iz e d . It c o v e rs c o m p u te r fu n d a m e n ta ls , b a s ic e le c tro n ic s ,