74HC19 Search Results

HC192

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/74HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163D September 1997 - Revised December 2002 High Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

74HCT192

Contextual Info: GD54/74HC192, GD54/74HCT192 SYNCHRONOUS DECADE UP/DOWN COUNTER WITH A CLEAR & DUAL CLOCKS General Description Pin Configuration These devices are identical in pinout to the 5 4 /7 4 L S 1 92. This decade counter has two separate clock inputs; an up count input and a down

Contextual Info: GD54/74HC191, GD54/74HCT191 SYNCHRONOUS 4-BIT BINARY UP-DOWN COUNTER WITH MODE CONTROL General Description These d e vices are identical in pinout to the 5 4 /7 4 L S 1 9 1 . This synch ron ous, reversible, 4-B it binary up/down counter can be preset by applying the

IC - 74HC191

Abstract: 74HC191 PC 74 HCT 32 P
Contextual Info: T - H 5 -2 .3 - Technical D ata . CD54/74HC190, CD54/74HCT190 CD54/74HC191, CD54/74HCT191 HARRIS SEMICOND SECTOR 27E File Number 4302271 D 1662 DD17bh7' 3 H B H A S High-Speed CMOS Logic 8 C 0 /B IN A R Y PRESET Presettable Synchronous 4-Bit Up/Down Counters

Contextual Info: . Technical Data File N um ber CD54/74HC194 CD54/74HCT194 1668 High-Speed CMOS Logic 4-Bit Bidirectional Universal Shift Register T y p e Featu res: • F o u r O pe ratin g M odes: S h ift R ight, S h ift Left, H o ld a n d Reset ■ S ynchronou s p a ra lle l o r seria l operatio n

Contextual Info: M54/74HC190 M54/74HC191 / = T S G S -T H O M S O N *7# ^0 g^ i[L[Ì(gì (S R50(gi 4-BIT SYNCHRONOUS UP/DOWN COUNTERS • LOW POWER DISSIPATION Ice = 4 tiA (MAX.) at T a = 25°C ■ HIGH NOISE IMMUNITY V nih = V nil = 28% Vcc (Min.) ■ OUTPUT DRIVE CAPABILITY

Contextual Info: I M54/74HC192 M54/74HC193 r z r j S G S -T H O M S O N HC192 - SYNCHRONOUS UP/DOWN DECADE COUNTER HC193 - SYNCHRONOUS UP/DOWN BINARY COUNTER • LOW POWER DISSIPATION Ice = 4 MAX. at Ta = 25°C ■ HIGH NOISE IMMUNITY V n IH = V n i L = ^ 0/,° ^ CC ( ^ 'n )

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/74HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

74hc192

Abstract: CD74HC192 application note
Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/74HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

Contextual Info: T e c h n ic a l D a ta CD54/74HC190, CD54/74HCT190 CD54/74HC191, CD54/74HCT191 File N um ber T exas In s t r u m e n t s High-Speed CMOS Logic B C0/8IN A RY PRESET 151 CLOCK - 14 UP/DOWN COUNT ENABLE 11 101 Si 11 S 4 Data sheet acquired from Harris Semiconductor

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/74HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

74HC194

Abstract: HC194 CD74HCT194 CD54HC194F3A CD74HC194E CD74HC194M CD74HC194NSR CD54HC194
Contextual Info: [ /Title CD74 HC194, CD74H CT194 /Subject (HighSpeed CMOS Logic 4-Bit CD54/74HC194, CD74HCT194 Data sheet acquired from Harris Semiconductor SCHS164B High-Speed CMOS Logic 4-Bit Bidirectional Universal Shift Register September 1997 - Revised March 2002 Features

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/74HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/74HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

CD54HC195

Abstract: CD54HC195F3A CD74HC195 CD74HC195E CD74HC195M
Contextual Info: [ /Title CD74 HC195 /Subject (High Speed CMOS Logic 4-Bit Parallel Access Register) /Autho CD54/74HC195 Data sheet acquired from Harris Semiconductor SCHS165A High Speed CMOS Logic 4-Bit Parallel Access Register September 1997 - Revised May 2000 Features

Contextual Info: 74HC193; 74HCT193 Presettable synchronous 4-bit binary up/down counter Rev. 03 — 23 May 2007 Product data sheet 1. General description The 74HC193 and 74HCT193 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL LSTTL . They are specified in compliance with

Contextual Info: MOTOROLA H SEMICONDUCTOR TECHNICAL DATA MC54/74HC195 4-B it Universal S hift Register High-Performance Silicon-Gate CM O S J SUFFIX CERAMIC CASE 620-09 T h e M C 5 4 /7 4 H C 1 9 5 is id e n tic a l in p in o u t to th e L S 1 9 5 . T h e d e v ic e in p u ts a re

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HC195 4-B it Universal Shift Register High-Performance Silicon-Gate CM O S J SUFFIX CERAMIC CASE 620-09 T he M C 54/74H C 19 5 is identical in p in o u t to the LS195. The device in p u ts are c o m p a t.b le w ith standard C M O S o u tp u ts , w ith pull up resistors, they are c o m p a tib le

IC 74LS190

Contextual Info: Æ 7 S G S -T H O M S O N ^0 l@i[L[i gTOR!]Q(gi M54/74HC190 M54/74HC191 4-BIT SYNCHRONOUS UP/DOWN COUNTERS • LOW POWER DISSIPATION Ice = 4 /»A (MAX. at TA = 25°C ■ HIGH NOISE IMMUNITY V NIH = VNIL = 28% Vcc (Min.) ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS

Contextual Info: MC54/74HC192 MOTOROLA Product P r e v ie w HIGH-PERFORMANCE CMOS PRESETTABLE BCD U P /D O W N COUNTER W ITH RESET The MC54/74HC192 is identical in pinout to the LS192. The device in­ puts are compatible w ith standard CMOS outputs; w ith pullup resistors, they are compatible w ith LSTTL outputs.

Contextual Info: M OTOROLA Product Preview HIGH-PERFORMANCE CMOS P R E S E T T A B LE BCD UP/DOWN COUNTER The MC54/74HC190 is identical in pinout to the LS190. The device in­ puts are compatible w ith standard CMOS outputs; w ith pullup resistors, they are compatible w ith LSTTL outputs.

HC193

Abstract: CD54HC192 CD54HC193 HC192
Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/74HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163D September 1997 - Revised December 2002 High Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

74HC

Abstract: LS193 MC74HCXXXN low power 4 bit c mos counter 74HC193
Contextual Info: M O TO R O LA Product P r e v ie w HIGH-PERFORMANCE CMOS LOW -POW ER C O M PLEM EN TAR Y MOS S ILICO N-G ATE PRESETTABLE 4-BIT BINARY U P /D O W N COUNTER W ITH RESET The MC54/74HC193 is identical in pinout to the LS193. The device in­ puts are compatible w ith standard CMOS outputs; w ith pullup

74HC193 74HCT193

Abstract: CD54HC192F3A CD54HC193F3A HC192 HC193
Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/74HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters