74LS02 PIN Search Results

lm294oct

Abstract: d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C
Contextual Info: Integrated Circuits 74LS Series Featuring better performance than standard 7400 series devices, the 74LS series also uses about 1/5th the power. Part# Pins Description 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 74LS10 74LS11 74LS12

74LS02 pin configuration

Abstract: 74LS02 function table
Contextual Info: GD54/74LS02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES Description Pin Configuration This device contains four independent 2-input NOR gates. It performs the Boolean functions Y = A B or Y = A + B in positive logic. Vcc 4Y 4B 4A 3Y 3B 3A Function Table INPUTS A

Contextual Info: GD54/74LS02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES Description Pin Configuration This device contains four independent 2-input NOR gates. It performs the Boolean functions Y = A B or Y = A + B in positive logic. VCc 4Y 4B 4A 3Y 3B 3A Function Table INPUTS OUTPUT

7402 NOR gate ic pin configuration

Abstract: IC 7402 IC PIN CONFIGURATION OF 74LS02 7402 pin configuration 74LS02 pin configuration 74LS02 function table 7402 ic ttl 7402 7402 logic gate ic IC 74LS02
Contextual Info: Signetics I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE VCC = 5V±5%; Ta = 0°C to +70°C

74LS02 pin configuration

Abstract: 74LS02 74LS02 function table pin configuration logic symbol 74LS02 pin configuration 74LS02 74ls gate symbols 54LS 74LS
Contextual Info: GD54/74LS02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES Description Pin Configuration This device contains four independent 2-input NOR gates. It performs the Boolean functions Y = A B or Y = A + B in positive logic. 4Y 4B 4A n fi rn 3Y m 3B 3A m I« <£J LcSL Function Table

7402 pin configuration

Abstract: TTL 7402 7402 TTL specification of 74ls02 7402 nor 7402 signetics 7402 NOR gate 74LS02 pin configuration 7402 7402 quad 2 input not
Contextual Info: 7402, LS02, S02 Signetics Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V +5 % ; T a = 0°C to + 7 0 “C

7402 TTL

Abstract: 7402 TTL 7402 7402 pin configuration 74LS02 function table 74LS02 pin configuration 7402 signetics TTL specification of 74ls02 7402 nor 74S02
Contextual Info: Signetics I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPE TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE VCc = 5V ±5% ; T a = 0°C to +70°C

TTL LS 7402

Abstract: 74LS02 pin configuration TTL 7402 7402 pin configuration 7402 TTL 7402 NOR gate 7402 74LS 7402
Contextual Info: Signetics I 7402, LS02, S02 Gates Quad Two-input NOR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE VCC = 5 V ± 5 % ; T A = 0°C to +70°C

Contextual Info: CONNECTION DIAGRAMS PINOUT A 54/7402 0//<Tr/ Ç ‘'&4S/74S02 e » //û s" ^S4LS/74LS02 Q UAD 2-INPUT NOR GATE ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE Vcc = +5.0 V ±5%, = 0°C to +70° C Ta MILITARY GRADE Vcc = +6.0 V ± 10%, = -55° C to +125° C

IC 74LS02

Abstract: 74LS02 pinout 74LS02 7402pc 74LS02P 74S02PC
Contextual Info: NATIONAL SEflICOND { L O G I C } DEE D I bSGliea 00^3^3^ 1 I CO NN ECTIO N DIAGRAMS PINOUT A 54/7402 54S/74S02 54LS/74LS02 QUAD 2-INPUT NOR GATE ORDERING CODE: See S ection 9 PIN PKGS CO M M ERCIAL GRADE V cc = +5.0 V ±5%, = 0 °C to +70° C O UT Ta M ILITARY GRADE

Contextual Info: SA NY O SEMICONDUCTOR 15E D I CORP 7 clci7G7b O O O S b O D LC74HC02 3003A *• v ’ ~ CM O S High-Speed Standard Logic LC74HC Series Quad 2-Input N O R Gate 16958 Features The LC74HC02 consists of 4 identical 2-input NOR gates. Uses CMOS silicon gate process technology to achieve operating speeds similar to LS-TTL 74LS02 with the

74LS02 gate diagram

Abstract: CI 74LS02 pin diagram of 74ls02 74LS02 IC TTL 74LS02 IC 74LS02 74LSTTL cmos 74ls02 74LS02 truth table 74LSTTL 5V
Contextual Info: SANYO SEMICONDUCTOR 12E CORP LC74HC02M 40 3034 A » 1 7 ci c1 7 0 7 t 1 Q Q 0 2 b 0 4 C M O S High-Speed Standard Logic L C 7 4 H C Series Quad 2-Input NOR Gate 2139A Features • The LC74HC02M consists of 4 identical 2-input NOR gates. • Uses CMOS silicon gate process technology to achieve operating speeds similar to LS-TTL 74LS02 with the

74LS02 gate diagram

Abstract: TTL 74ls02 74LS02 truth table IC TTL 74LS02 74LS02 pinout T43CA 74LS02 LC74HC02 LC74HC02M IC 74LS02
Contextual Info: SANYO SEMICONDUCTOR 12E CORP LC74HC02M 40 3034 A » 1 7 ci c1 7 0 7 t 1 Q Q 0 2 b 0 4 C M O S High-Speed Standard Logic L C 7 4 H C Series Quad 2-Input NOR Gate 2139A Features • The LC74HC02M consists of 4 identical 2-input NOR gates. • Uses CMOS silicon gate process technology to achieve operating speeds similar to LS-TTL 74LS02 with the

JM38510/01405BEA

Abstract: JM38510 JM38510/00101BCA M38510/10101BGC JM38510/10101BGC JM38510/10101BCB JM38510/00802BCA M38510
Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) JM38510/00401BCA ACTIVE CDIP

JM38510/01405BEA

Abstract: SN74LS02N M38510/01401BJB M38510
Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) JM38510/00401BCA ACTIVE CDIP

7411 pin diagram

Abstract: TTL 7408 DS 7409 74LS574 CI 7408 7407 connection diagram 74LS386 TTL 7408 DIAGRAMS 74LS08 PIN CI 74LS08
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D93 54LS/74LS379 D94 9386, 74LS266, 54LS/74LS386 D95 54LS/74LS398 r ei fi r E5i r?i n Vcc 1 4 5 12 13 4 5 7 6 14 15 17 16 lOa Ila lo b lib lo c lie lo d lid S CP Qa Qb 2 GND Vcc = Pin 20 GND = Pin 10 Vcc = Pin 16

74ls74

Abstract: 74HC377 74LS02 74LS175 TLC548 TMS320 TMS32020 TMS320C52
Contextual Info: Number 66 TMS320 DSP DESIGNER’S NOTEBOOK Interfacing a TMS320C2x, ’C2xx, or ’C5x DSP to a TLC548 8-bit A/D convertor Contribued by Gary Przyborski, Advantor Corp. Design Problem How do you interface a ’C2x, ’C2xx, or ’C5x DSP to a TLC548 8-bit A/D convertor?

IC TTL 74LS02

Abstract: IC 74LS02 cmos 74ls02 74LS02 PIN
Contextual Info: - TC74HCT02AP/AF QUAD 2-IN PU T NOR GATE The TC74HCT02A is a high speed CMOS 2-IN PU T NOR GATE fabricated with silicon gate C2M0S technology. It achieves the high speed operation sim ilar to equivalent LSTTL while m aintaining the CMOS low power

on off 555 timer using relay drive

Abstract: 555 timer truth table missing pulse detector using 555 555 off delay 555 off delay timer circuits constant current circuit using 555 timer 555 missing pulse detector circuit 555 missing pulse detector 74LS02 datasheet 555 timer remote control
Contextual Info: MID400 POWER LINE MONITOR INTRODUCTION The MID400 is an optically isolated AC line-to-logic interface device for monitoring ON or OFF status of an AC power line. The logic circuitry operates from a standard 5V supply. The MID400 is packaged in a compact 8-pin plastic DIP package. The optical isolation provided by the MID400 makes it suitable for power-to-logic

UL4Y

Contextual Info: TOSHIBA TC74HC02AP/AF Quad 2-Input NOR Gate The TC74HCT02A is a high speed CMOS 2-INPUT NOR GATE fabricated with silicon gate C 2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

Contextual Info: - - - - - - - - - - - - - TC74HC02AP/AF/AFN Q U A D 2 - I N P U T NOR G A T E The TC74HC02A is a high speed CMOS 2-IN PU T NOR GATE fabricated with silicon gate C~MOS technology. It achieves the high speed operation sim ilar to equivalent LSTTL while m aintaining the CMOS low power

M74HC02

Contextual Info: M IT S U B IS H I HIGH SPEED CMOS M74HC02P M74HC02DP QUADRUPLE 2 -IN P U T P O S IT IV E NOR GATE DESCRIPTION The M 74H C 02 is a sem iconductor integrated c ircu it con­ PIN CONFIGURATION TOP VIEW sisting of four 2-in put p o sitive -lo g ic NOR, usable as nega­

Contextual Info: TC74HCT02AP/AF Q U A D 2 - I N P U T NOR G A T E The TC74HCT02A is a high speed CMOS 2-IN PU T NOR GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation sim ilar to equivalent LSTTL while m aintaining the CMOS low power dissipation.

Contextual Info: SbE D m 7TETE37 13b • SGS-THOMSON M»ilLIOTMD ÊS S G S-THOMSON M54HCÖ2 M74HC02 T '* f3 -2 { QUAD 2-INPUT NOR GATE ■ HIGH SPEED tpD = 8 ns (TYP. at Vcc = 5V ■ LOW POWER DISSIPATION lCc = 1 i<A (MAX.) at Ta = 25°C ■ HIGH NOISE IMMUNITY v NIH = V n i l = 28% Vcc (MIN.)