74LS PINOUT Search Results

Contextual Info: GD54/74HC157, GD54/74HCT157 QUAD 2-INPUT SELECTORS/MULTIPLEXERS WITH NONINVERTED OUTPUT General Description Pin Configuration These devices are identical in pinout to the 54/74LS 157. They consist of four 2-input multiplex­ ers with common select and enable inputs, and

Contextual Info: GD54/74HC32, GD54/74HCT32 QUAD 2-INPUT OR GATES General Description These devices are identical in pinout to the 54/74LS 32. They contain four independent 2-input OR gates. These devices are characterized for operation over wide temperature ranges to meet in­

IC 7413

Abstract: 74LS PINOUT
Contextual Info: 13 CO NNECTIO N DIAGRAM PINOUT A *'§4/7413 t^4LS /74LS 13P i DUAL 4-IN PU T SC HM ITT TRIGGER ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE MILITARY GRADE V cc = +5.0 V ±5%, T a = 0° C to +70° C V cc = +5.0 V ±10%, T a = -55° C to +125° C

Contextual Info: g M OTOROLA SN54/74LS353 DUAL 4-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS The LSTTL/M SI SN 54/74LS 353 is a Dual 4-Input Multiplexer with 3-state outputs. It can select two bits of data from four sources using common select inputs. The outputs may be individually switched to a high impedance state

Contextual Info: 378 V 54LS/74LS378 CO NNECTIO N DIAGRAM PINOUT A f PARALLEL D REGISTER With Enable DESCRIPTION — The ’378 is a 6-bit register with a buffered com m on enable. This device is sim ilar to the '174, but with com m on Enable rather than com ­ mon Master Reset.

MAX2333

Contextual Info: 251 CONNECTION DIAGRAM PINOUT A M 7 ^4S/74S251 V54LS/74LS251 8-INPUT MULTIPLEXER With 3-State Outputs u[T ÜJvcc i 2[T Ü]l4 ii {T io[7 mi« ZG 1^17 *G OE^ 22] Si GND[8 H s2 DESCRIPTION — The ’251 is a high speed 8-input digital m ultiplexer. It pro­

74LS04 fan-out

Abstract: 7404PC 74LS04PC 74LS04 pinout 74s04p 74Ls04 fanout 74ls04 hex inverter 74LS04* hEX INVERTER 74LS04P 7404FC
Contextual Info: 04 CO NNECTIO N DIAGRAMS PINOUT A ^ 4 /7 4 0 4 ¡54H/74H04 ^ 4S /7 4 S 0 4 /54S/74S04A ^4LS/74LS04 / r Œ Œ [I Œ - 6 3 HEX INVERTER g n d ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%, T a = 0°C to +70° C

5437DM

Contextual Info: 37 CO NNECTIO N DIAGRAM PINOUT A .54/7437 ¿' 'S 7b. 54LS/74LS37 0 / / j 77 QUAD 2-INPUT NAND BUFFER OROERING CODE: See Section 9 PIN PKGS OUT CO M M ERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%, Ta = 0°C to +70° C V cc = +5.0 V ±10%, T a = -55° c to +125°C

IC 7405

Abstract: 7405DC 7405PC 74LS05DC
Contextual Info: 05 V _ CO NNECTIO N DIAGRAMS PINOUT A '54/7405 f c*C1 ¿4H /74H 05 0 ' c ^54S/74S05 cs' ; 5 7 1/Ä4S/74S05A D / b S - 7 0 HÎ4LS/74LS05 OIOS y ^ / E - Œ Œ HEX INVERTER (With Open-Collector Output g n d Tjjvcc I m m E [I GE 33 (T 3 e 3 ORDERING CODE: See Section 9

ic 74ls48 and 7 segment

Abstract: 74LS48PC decoder 74LS48
Contextual Info: 48 CO NNECTIO N DIAGRAM PINOUT A 54/7448y 54LS/74LS48^ ao[T BCD TO 7-SEGMENT DECODER DESCRIPTION — The '48 translates fo u r lines of BCD 8421 Input data into the 7-segment numeral code and provides seven corresponding outputs having pull-up resistors, as opposed to totem pole pull-ups. These outputs

pin diagram of ic 74ls151

Abstract: 74LS151 TTL 74ls151 74LS151 Logic DIAGRAM
Contextual Info: SA NY O SEMICONDUCTOR CORP 12E D I 7 i ^7□ 7 h □□02L.C14 h "|~ mÊÊÊÊmHÊSK LC74HC151M; ‘ - 1 V~’éásNr t l - s V K# C M O S High-Speed Standard Logic LC74H C Series 3035A 8-Channel Multiplexer 2143 Features The LC74HC151M selects one o f the eight binary data inputs, as determined by the address inputs.

IC 74LS42 N

Abstract: 3035AM
Contextual Info: SANYO SEMICONDUCTOR CORP LC74HC42M 10 CMOS High-Speed Standard Logic LC74HC Series 3035a * " — -' BCD to Decimal Decoder ^ 2098A ’ ‘ Features . • The LC74HC42M decodes a B C D address to one-of-ten active-low outputs. • Uses C M O S silicon gate process technology to achieve operating speeds similar to LS-TTL 74LS42 with the

pin diagram of ic 74ls138

Abstract: IC 74ls138 and gate 74LS138
Contextual Info: SANYO SEMI CONDUCTOR CORP S S 1 8 I¡IB B ii LC74HC138M 1EE D 1 T'H TD Tb CT~fc7 -2-i - S S iß OG-QHtiflS CMOS High-Speed Standard Logic LC74HC Series 3035A - 3 to 8 - Line Decoder £ 2100A ' Features ' • The LC74HC138M decodes a three-bit address to one-of-eight active-low outputs.

Contextual Info: GD54/74LS541 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUT NONINVERTED Features P in C o n fig u ra tio n OUTPUT CONTROL INPUT • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • P-N-P Inputs Reduce D-C Loading • Hysteresis at Inputs Improves Noise Margins

74LS

Abstract: M14A M14D MM74HCT32 MM74HCT32M MM74HCT32MTC MM74HCT32MX-NL MM74HCT32N MM74HCT32SJ
Contextual Info: Revised January 2005 MM74HCT32 Quad 2-Input OR Gate General Description Features The MM74HCT32 is a logic function fabricated by using advanced silicon-gate CMOS technology, which provides the inherent benefits of CMOS—low quiescent power and wide power supply range. This device is input and output

E2026A

Abstract: E2026
Contextual Info: SANYO SEMI CONDUCTOR CORP 1EE D ~| 7 c]ci7D7t3 0 0 D E b S 3 LC74HC5r , .• ' ;= r v • ^v-:i • ' v E2026A 3003A V' ■;y-¿ C M O S H igh-Speed Standard Logic L C 7 4 H C S eries Dual 2-Wide 2-Input AND/OR 1 M« iiivciiei uaic Features • The LC74HC51 consists of 2 identical AND OR inverters.

EN3911

Contextual Info: SANYO S E M I C O N D U CT O R CORP b3E D • 7TT7a7b GQ11177 HTS * T S A J Ordering number:EN3911_ I MLC74HC20M CMOS High-Speed Standard Logic Dual 4-Input NAND Gate F e a tu re s • The MLC74HC20M consists of 2 identical 4-input NAND gates. • Uses CMOS silicon gate process technology to achieve operating speeds sim ilar to LS ■TTL 74LS20

MM74HCT00

Abstract: 74LS M14A MM74HCT00M MM74HCT00MTC MM74HCT00MTCX MM74HCT00MX MM74HCT00N MM74HCT00SJ
Contextual Info: Revised January 2005 MM74HCT00 Quad 2 Input NAND Gate General Description Features The MM74HCT00 is a NAND gates fabricated using advanced silicon-gate CMOS technology which provides the inherent benefits of CMOS—low quiescent power and wide power supply range. This device is input and output

PHL 7S

Contextual Info: 1 5 E D I 7Ti707h 00QE723 SANYO SEMICONDU CTOR CORP -•fV> * ' ' T - H i - z ' r ' . 1 / > "77I L i f v + ïÀ p p LG74rl 3021B CMOS High-Speed Standard Logic LC74HC Series Octal 3-State Inverting Buffer/ Line Driver/Receiver 2043A Features The LC74HC240 consists of 8 identical inverting buffers/line drivers/receivers with 3-state outputs.

Contextual Info: SANYO S E M I C O N D U CTOR I Ordering number: EN 3670 _ CORP b3E D • 7 t1t1 7 0 7 b 0012754 2Û0 * T S A J MLC74HC158 AM CMOS High-Speed Standard Logic Quad 2-Input Inverting Data Selector/Multiplexer F e a tu re s • The MLC74HC158AM selects a 4-bit word from either the A or B inputs, as determined by the SEL

Contextual Info: SANYO SEMICONDUCTOR CORP 1S E D I 7 en 7 G 7 b OGOSbMñ T-t>7 -2.l-s-7 mU%ffÊÊÊÉ# C7 4 HC42 3006B C M O S H igh-Speed Standard Logic LC 74H C Series BCD to Decimal Decoder S 2 0 2 5A Features • The LC74HC42 is a BCD-to-decimal decoder. • Uses CMOS silicon gate process technology to achieve operating speeds similar to LS-TTL 74LS42 w ith the

74HCU

Abstract: 74LS M14A M14D MM74HCU04 MM74HCU04M MM74HCU04MTC MM74HCU04MX MM74HCU04N MM74HCU04SJ
Contextual Info: Revised January 2005 MM74HCU04 Hex Inverter General Description Features The MM74HCU04 inverters utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits.

MM74HC32N

Abstract: 74HC 74LS M14A MM74HC32 MM74HC32M MM74HC32MTC MM74HC32MTCX MM74HC32MX MM74HC32SJ
Contextual Info: Revised January 2005 MM74HC32 Quad 2-Input OR Gate General Description Features The MM74HC32 OR gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits. All gates have buffered outputs

TTL 74LS244

Contextual Info: SAN YO S E M I C O N D U C T O R CORP S3E D ? m 0 7 t , OGIOIRM bR? « T S A J • T-S'Z-OT [ Ordering number: E N 3 5 9 6 MLC74HC244AM No.3596 CMOS High-Speed Standard Logic Octal 3-State N on inverting Buffer/Line D river/Line Receiver F e a tu re s ■The MLC74HC244AM consists of 8 identical noninverting bulTers/line drivers/receivers with 3-state