74LS LOGIC GATES Search Results

74S02N

Abstract: 7402 NOR gate ic pin configuration IC 7402 74LS02N LS 7402 IC PIN CONFIGURATION OF 74LS02 7402 pin configuration 74ls02 signetics 7402 quad 2 input not 74LS02 pin configuration
Contextual Info: Signetìcs I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY TYPE 7402 10ns 11m A 74LS 02 10ns 2.2m A 74S 02 3.5ns 22m A ORDERING CODE COMMERCIAL RANGE VCc = 5V ±5% ; T a = 0°C to +70°C

M74LS20P

Abstract: 20-PIN
Contextual Info: MITSUBISHI LSTTLs M 74LS20P DUAL 4 -IN P U T P O S IT IV E NAND GATE DESCRIPTION The M 74LS 20P is a semiconductor integrated containing tw o 4-inp ut positive N A N D circuit gates, usable as negative-logic N O R gates. FEATURES • High breakdown input voltage V | > 15V

74LS08 Quad 2-Input AND Gates

Abstract: TTL 74s32 TTL 7408 or 2 input 74Ls32 74LS11 and 74LS32 74ls32 quad 2-input OR gates 54LS TTL 7421 74LS 3-input NOR 74LS11
Contextual Info: FAIRCHILD DIGITAL TTL High Speed 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 3 ns/19 mW Logic/Connection Diagram'2’ E £ Std. TTL 54/74 10 ns/10 mW ~c o o c S U. Low Power Schottky 54LS/74LS 5 ns/2 mW Cont’d 9000 Series 8 ns/10 mW SSI FUNCTIONS 5

7421 pin configuration

Abstract: 7420 pin configuration 74LS20 PIN CONFIGURATION 7421 logic gate 7421 AND 74LS20 function table 74LS21 PIN CONFIGURATION TTL 7420 7421 AND gate PIN CONFIGURATION 7420
Contextual Info: Signehcs I 7420, 7421, LS20, LS21, S20 Gates Logic Products Dual Four-Input NAND '20 AND ('21) Gate Product Specification • TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT (TOTAL) 7420 10ns 8mA 74LS20 10ns 0.8mA 8mA 74S20 3ns 7421 12ns 8mA 74LS21

PIN CONFIGURATION OF 74LS30

Abstract: TTL 7430 7430 ic IC 7430 7430 Eight-Input NAND Gate 7430 pin configuration 7430 74ls30 equivalent 8 input nand gate 7430
Contextual Info: Signetics I 7430, LS30 Gates Eight-Input NAND Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7430 11ns 2mA 74LS30 11ns 0.5mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5%; Ta = 0°C to +70°C PACKAGES

74LS260

Contextual Info: 74LS260, S260 Signetics Gates Dual 5-Input NOR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 74LS260 9ns 4mA 74S260 4ns 22mA FUNCTION TABLE INPUTS OUTPUT A B C D E Y H X X X X L X H X X X L X X H X

74Ls signetics

Abstract: 74LS logic gates IC 74LS 74LS09 ttl ic ttl 74ls 74ls ic 74LS09 function table
Contextual Info: 74LS09 Signetics Gates Quad Two-Input AND Gate Open Collector Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 23ns 4.3 74LS09 ORDERING CODE PACKAGES COMMERCIAL RANGE Vcc = 5V + 5%; T A = 0”C to +70°C

schmitt trigger 7413

Abstract: equivalent for 74LS13 PIN CONFIGURATION 74ls13 equivalent for 7413 dual schmitt trigger 7413 4-input nand gate 853051 ttl 7413
Contextual Info: Signetics 7413, LS13 Gates Dual 4-Input NAND Schmitt Trigger Product Specification Logic Products DESCRIPTION The ’ 13 contains two 4-input NAND gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming

7427 pin configuration

Abstract: TTL 7427 CI 74LS27 TTL 7427 NOR propagation delay TTL 74ls27 IC 7427 74LS27 function table ci 7427 LS27 pin configuration of 7427
Contextual Info: Signetics I 7427, LS27 Gates Triple Three-Input NOR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7427 9ns 13mA 74LS27 10ns 2.7mA ORDERING CODE COMMERCIAL RANGE VCC = 5 V ± 5 % ; T A ssO°C to +70°C

TTL 7411

Abstract: PIN CONFIGURATION 7410 74LS11 function table TTL LS 7411 74 LS 00 Logic Gates LS 7411 74LS10 pin configuration TTL 7410 TTL 7410 AND propagation delay PIN CONFIGURATION 74ls10
Contextual Info: Signetics I 7410, 7411, LS10, LS11, S10, S11 Gates Logic Products Triple Three-Input NAND '10 , AND ('11) Gates Product Specification I TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT (TOTAL) 7410 9ns 6mA 74LS10 10ns 1.2mA 74S10 3ns 12mA 7411 10ns 11mA

7430 ic

Abstract: IC 7430 PIN CONFIGURATION OF 74LS30 7430 LS 7430
Contextual Info: Signelics | 74 3 0 , LS30 Gates Eight-Input NAND Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7430 11ns 2mA 74LS30 11ns 0.5mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; T a = 0°C to + 70°C PACKAGES

specifications of IC 7432 supply voltage

Abstract: 7432 pin configuration 7432 or gate ic IC 7432 74LS 7432 7432 ic or ic 7432 IC TTL 7432 IC 7432 for or gate Fanout value of IC 7432
Contextual Info: Signetics I 7432, LS32, S32 Gates Quad Two-Input OR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 4ns 28mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5%; Ta = 0°C to +70°C

ic 7451 pin configuration

Abstract: 74 LS 00 Logic Gates
Contextual Info: 7451, LS51, S51 Signetics Gates '51, 'S51 Dual 2-Wide 2-Input AND-OR-lnvert Gate LS51 Dual 2-Wide 3-Input, 2-Wide 2-Input AND-OR-lnvert Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7451 11ns 5.7mA 74LS51

rs flip-flop IC 7400

Abstract: 74ls105 TTL LS 7400 74LS series logic gates 7400 fan-out 74LS 3 input AND gate IC TTL 7400 schematic 74LS04 fan-out 74ls series logic family 90 watts inverter by 12v dc with 6 transisters
Contextual Info: GENERAL DESCRIPTION ABSOLUTE MAXIMUM RATINGS Ovar operating free-air temper­ ature range unless otherwise noted Supply Voltage Vq c (See Note 1) Input Voltage V|n (See Note 1) Interemitter Voltage (See Note 2) Resistor Node Voltage, 54121, 74121 (See Note 1)

ic 74192 pin configuration

Abstract: pin diagram of counter ic 74193 ic 74193 ic 74192 ic 74192 pin diagram 74192 ic TTL 74192 ttl 74193 74192 pin configuration IC 74LS192
Contextual Info: Sìgnetìcs 74192, 74193, LS192, LS193 Logic Products FEATURES • Synchronous reversible 4-bit binary counting • Asynchronous parallel load • Asynchronous reset clear • Expandable without external logic 1 Counters TYPE TYPICAL fMAX TYPICAL SUPPLY CURRENT

74xx04

Abstract: 74XX08 74XX00 74xx151 74xx161 TTL 74XX04 CMOS TTL Logic Family Specifications 74xx139 74als power consumption 74XX374
Contextual Info: Fairchild Semiconductor Application Note 319 June 1983 The MM54HC/MM74HC family of high speed logic components provides a combination of speed and power characteristics that is not duplicated by bipolar logic families or any other CMOS family. This CMOS family has operating speeds

Contextual Info: DESCRIPTION PIN CONFIGURATION Each of these Schottky-clam ped data selectors/multiplexers co n ­ tains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the A N D - O R gates. Separate output control inputs are provided for each of the two four-line sec­

pe 5571

Contextual Info: Signetics 74S534 Flip-Flop Octal D Flip-Flop With 3-State Outputs Product Specification Logic Products FEATURES • 8-bit positive, edge-triggered register • Inverting outputs • 3-State output buffers • Common 3-State Output Enable • Independent register and 3-State

Contextual Info: 74S534 Signelics Flip-Flop Octal D Flip-Flop With 3-State Outputs Product Specification Logic Products FEATURES • 8-bit positive, edge-triggered register TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 8ns 116mA 74S534 • Inverting outputs

IC 74156

Abstract: 74 LS 00 Logic Gates EA45 pin configuration IC 74156 74ls156 ic address decoder 54156DM 54156FM 54LS156DM 74156DC
Contextual Info: 156 CONNECTION DIAGRAM P IN O U T A c 54/74156 54LS/74LS156 7 6 ' n i DUAL 1-O F-4 DECODER/DEMULTIPLEXER E a [T Ü]vcc Ë a |T ii] E b W ith O p e n -C o lle c to r O utputs Ai [7 H ]Ë b Osa 14 m O a a fT Ï71 0 3b Ao O la 77| 02b 00a [ T *To| ölb GND [7

single phase inverters circuit diagram

Abstract: 3 phase inverters circuit diagram circuit diagram for single phase inverters three phase inverters circuit diagram pin configuration BFW 11 S54LS138
Contextual Info: SPEED/PACKAGE AVAILABILITY FUNCTION TABLE INPUTS PIN CONFIGURATION OUTPUT A B Y L L H H L H L H L H H L H - high level, L - tow level SWITCHING CHARACTERISTICS v QC - 5V, t a = 2 5 °c LIMITS FROM PA R A M E T E R * INPUT l PLH A or B T E S T CONDITIONS

SN7412

Abstract: sn74ls12 N5412
Contextual Info: TYPES SN5412, SN54LS12 SN7412, SN74LS12 TRIPLF 3-INPUT POSITIVE •NAND GATES WITH OPEN-COLLECTOR OUTPUTS REVISED DECEMBER 1983 S N 5412, SN54LS12 . . . J OR W PACKAGE S N 7412 . . . J OR N PACKAGE SN74LS12 . . . D, J OR N PACKAGE Package Options include Both Plastic and

Contextual Info: High-Speed CMOS Logic MN74HC Series MN74HC20/MN74HC20S MN74HC20/MN74HC20S Dual 4-Input NAND Gates • Description MN74HC20/MN74HC205 contain two 4-input posi ive isolation NAND gate circuits. Adoption of a silicon gate CMOS process has resjlted in low power dissipation, a high noise margin equivalent to a standard

Contextual Info: High-Speed CMOS Logic MN74HC Series MN74HC27/MN74HC27S MN74HC27 MN74HC27S Triple 3 -Input NOR Gates P-1 • Description M N74HC27/M N74HC27S contain three 3-input positive isolation NOR gate circuits. A doption o f a silicon gate CMOS process has resulted in low