74HC404 Search Results

pinout diagram of 4049

Contextual Info: [ /Title CD74H C4049, CD74H C4050 /Subject (High Speed CMOS Logic Hex CD54/74HC4049, CD54/74HC4050 Data sheet acquired from Harris Semiconductor SCHS205B High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting February 1998 - Revised May 2000 Features

MC4049

Abstract: 74hc4050 74hc4049 RCA-CD54
Contextual Info: Technical Data CD54/74HC4049 CD54/74HC4050 File No. 1543 High-Speed CMOS Logic FUNCTIONAL DIAC¡RAM IB - NC V ' V CC-— 3 4 5 _ Hex Buffers, Inverting and Non-Inverting IÖ _ 2 6 7 4* £4 4* * * 14 6 A ia - NC 5A “ r it 1 0 _ . 8 6 N D -

Contextual Info: M54/74HC4020 M54/74HC4040 SGS-THOMSON M HC4020 14 STAGE BINARY COUNTER HC4040 12 STAGE BINARY COUNTER • HIGH SPEED fMAX = 73 MHz TYP. at Vcc = 5 V ■ LOW POWER DISSIPATION Icc = 4 |iA (MAX.) at Ta = 25 °C ■ HIGH NOISE IMMUNITY V nih = V nil = 28 % Vcc (MIN.)

Contextual Info: Technical Data CD54/74HC4049 CD54/74HC4050 File No. 1543 High-Speed CMOS Logic F U N C T I O N A L D IA C ¡R A M I6 - NC v cc— 3 4 5 3y 7 4* *ò * * 15 Tv 14 13 - NC 12 T i 8 GND- Type Features • Typical propagation delay = 6 ns @ Vcc = 5 V, CL = 15pF, 7a = 25° C

HC4046A

Abstract: motorola an535 70.455 74hc4046a On Semiconductors HC4046A AN1410 DL129 MC4044 on application note an1410 BR1334-D
Contextual Info: Order this document by AN1410/D AN1410 Application Note Configuring and Applying the MC54/74HC4046A PhaseĆLocked Loop A versatile device for 0.1 to 16MHz frequency synchronization Prepared by Cleon Petty Gary Tharalson Marten Smith Applications Engineering

Mc14040 MOtorola

Abstract: MC14040 948F HC4040A MC74HCXXXXAN 74c4040
Contextual Info: M O T O R O LA SEMICONDUCTOR TECHNICAL DATA 12-Stage Binary Ripple Counter MC54/74HC4040A High-Performance Silicon-Gate CMOS J SUFFIX CERAM IC PACKAGE CASE 6 2 0 -1 0 The MC54/74C4040A is identical in pinout to the standard CMOS MC14040. The device inputs are compatible with standard CMOS out­

CD74HC4046AM

Abstract: 4000B CD4046B CD54HC4046AF HC4046A HCT4046A
Contextual Info: [ /Title CD74 HC404 6A, CD74 HCT40 46A /Subject (HighSpeed CMOS CD54/74HC4046A, CD54/74HCT4046A Data sheet acquired from Harris Semiconductor SCHS204B High-Speed CMOS Logic Phase-Locked-Loop with VCO February 1998 - Revised March 2002 Features Description

74HC4040

Abstract: C4040 CD54HC4040F CD54HC4040F3A HC4040 HCT4040 74hct4040
Contextual Info: [ /Title CD74H C4040, CD74HC T4040 /Subject (High Speed CMOS Logic 12-Stage Binary CD54/74HC4040, CD54/74HCT4040 Data sheet acquired from Harris Semiconductor SCHS203B High Speed CMOS Logic 12-Stage Binary Counter February 1998 - Revised March 2002 Features

Contextual Info: [ /Title CD74H C4049, CD74H C4050 /Subject (High Speed CMOS Logic Hex CD54/74HC4049, CD54/74HC4050 Data sheet acquired from Harris Semiconductor SCHS205B High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting February 1998 - Revised May 2000 Features

74ls297

Abstract: hc4046a Application Note 74hc4046a SCHA003 74hc4046a SCHA002 4046a 74HCT4046A 74HCT4046A APPLICATION NOTE
Contextual Info: [ /Title CD74 HC404 6A, CD74 HCT40 46A /Subject (HighSpeed CMOS CD54/74HC4046A, CD54/74HCT4046A Data sheet acquired from Harris Semiconductor SCHS204C High-Speed CMOS Logic Phase-Locked-Loop with VCO February 1998 - Revised March 2002 Features Description

fm modulation and demodulation

Abstract: 74HCT4046 74HC4046A harris QRD11 4000B CD4046B CD54HC4046AF HC4046A HCT4046A 74HC4046
Contextual Info: [ /Title CD74 HC404 6A, CD74 HCT40 46A /Subject (HighSpeed CMOS CD54/74HC4046A, CD54/74HCT4046A Data sheet acquired from Harris Semiconductor SCHS204A High-Speed CMOS Logic Phase-Locked-Loop with VCO February 1998 - Revised May 2000 Features Description

74hct04a

Abstract: MC14000-series hc4049 hc4060 MC54/74HC4050 MC14000 MC14049UB MC14050B MC74HCXXXXN MC14049U
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HC4049 MC54/74HC4050 Hex Buffers/Logic-Level Down Converters High–Performance Silicon–Gate CMOS The MC54/74HC4049 consists of six inverting buffers, and the MC54/74HC4050 consists of six noninverting buffers. They are identical in

74hc4040

Abstract: ic 4040b M74HC4040B1N 4040B 54HC 74HC M54HC4040 M74HC4040
Contextual Info: SGS-THOMSON M 54H C 4040 M 74HC4040 0 8 ILI®TT[f3®5i!]0 g§ 12-STAGE BINARY COUNTER i H IG H S P E E D fMAX = 60 M H z (T Y P . at Vc c = 5 V i L O W P O W E R D IS S IP A T IO N ICC = 4 / jA (M A X .) at T a = 2 5 ° C H IG H N O IS E IM M U N IT Y VNIH = V n il = 2 8 % V c c (M IN .)

74HC4040

Abstract: 74hct4040
Contextual Info: Technical Data CD54/74HC4040 CD54/74HCT4040 File Number 1483 High-Speed CMOS Logic 12-Stage Binary Counter 12-STAGE Type Features: SIPPlE COUNTER -12-09 -Li-oto MASTER RESET • m ■ » ■ Fully static operation B uffered inputs Com m on reset Negative edge pufsing

cs1m

Abstract: 74HC4040
Contextual Info: Technical Data CD54/74HC4040 CD54/74HCT4040 File Number 1483 High-Speed CMOS Logic 12-Stage Binary Counter ig-STAGE Type Features: RIPPLE COUNTER -1Ä-09 -ÜQIO MASTER RESET 92CS-29066BÎ • ■ ■ ■ ■ Fully static operation Buffered inputs Common reset

74HC4040

Abstract: 74HC4040 data sheet 74HC-HCT4040 mr 4040 20050914 74HC4040BQ 74HC4040D 74HC4040DB 74HC4040N 74HC4040PW
Contextual Info: 74HC4040; 74HCT4040 12-stage binary ripple counter Rev. 03 — 14 September 2005 Product data sheet 1. General description The 74HC4040; 74HCT4040 are high-speed Si-gate CMOS devices and are pin compatible with the HEF4040B series. They are specified in compliance with JEDEC

74HC4040

Abstract: 74HCT4040
Contextual Info: Technical D ata . CD54/74HC4040 CD54/74HCT4040 File Number HARRI S S E M I C O N D SE CT OR E7E ]> 1483 4 3 D2 27 1 ÜDl.T'ÛT'S'-£ Si HAS High-Speed CMOS Logic —2.01* ' — 02 —-2.03 - io < —i o s I2-3UGE RIPPLE COUNTW - ÍQ 7 J A Q9 -Li-09 J A «yo

74HC4040

Abstract: 74HCT4040 74HC4040BQ 74HC4040D 74HC4040DB 74HC4040N 74HC4040PW HEF4040B JESD22-A114-C
Contextual Info: 74HC4040; 74HCT4040 12-stage binary ripple counter Product data sheet 1. General description The 74HC4040; 74HCT4040 are high-speed Si-gate CMOS devices and are pin compatible with the HEF4040B series. They are specified in compliance with JEDEC standard no. 7A.

mc14046

Abstract: 74HC4046A ic dip h 5470 pll motor control fg fv 74HC4046AD
Contextual Info: MOTOROLA SC b lE LO G IC D • b3b?252 □ Q c1 2 0 t1fi ?T1 «P IO TM 7 - ITo _ , *7 MOTOROLA SEMICONDUCTOR! TECHNICAL DATA MC54/74HC4046A Phase-Locked Loop High-Performance Silicon-Gate CMOS The MC54/74HC4046A is similar in function to the MC14046 Metal gate C M O S

Contextual Info: [ /Title CD74H C4049, CD74H C4050 /Subject (High Speed CMOS Logic Hex CD54/74HC4049, CD54/74HC4050 Data sheet acquired from Harris Semiconductor SCHS205C High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting February 1998 - Revised March 2002 Features

Contextual Info: [ /Title CD74H C4049, CD74H C4050 /Subject (High Speed CMOS Logic Hex CD54/74HC4049, CD54/74HC4050 Data sheet acquired from Harris Semiconductor SCHS205C High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting February 1998 - Revised March 2002 Features

Contextual Info: 74HC4040; 74HCT4040 12-stage binary ripple counter Rev. 03 — 14 September 2005 Product data sheet 1. General description The 74HC4040; 74HCT4040 are high-speed Si-gate CMOS devices and are pin compatible with the HEF4040B series. They are specified in compliance with JEDEC

74HCT4050

Contextual Info: Technical Data _ CD54/74HC4049, CD54/74HCT4049 CD54/74HC4050, CD54/74HCT4050 F U N C T IO N A L D IA G R A M Hex Buffers, Inverting and Non-Inverting Type Features • Typical propagation delay = 6 ns @ V cc = 5 V, CL = 15pF, Ta = 25° C

C4050

Abstract: 74hc4049m c4049 MC14000-series
Contextual Info: m o to r o la h SEMICONDUCTOR TECHNICAL DATA MC54/74HC4049 MC54/74HC4050 Hex Buffers/Logic-Level Dow n Converters J SUFFIX CERAMIC CASE 620-09 High-Performance Silicon-Gate CM O S The MC54/74HC4049 consists o f six inverting buffers, and the MC54/74HC4050