74HC27 Search Results

74HC27

Abstract: dhvqfn14 74HC27N 74HC27BQ 74HC27D 74HC27DB 74HC27PW 74HCT27 JESD22-A114E HCT273
Contextual Info: 74HC27; 74HCT27 Triple 3-input NOR gate Rev. 03 — 7 January 2008 Product data sheet 1. General description The 74HC27; 74HCT27 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL LSTTL . The 74HC27; 74HCT27 provides the 3-input NOR function.

Contextual Info: Technical Data CD54/74HC273 CD54/74HCT273 File Number 1479 High-Speed CMOS Logic Octal D Flip-Flop with Reset Type Features: • Common clock and asynchronous master reset ■ Positive-edge triggering ■ Buffered inputs ■ Typical fmat — 60 MHz @ Vcc ~ 5 V, C l = 15pF, 7a = 25° C

Contextual Info: MOTOROLA S E M IC O N D U C T O R TECHNICAL DATA MC54/74HC27 T rip le 3 -In p u t N O R G a te High-Performance Silicon-Gate C M O S J SUFFIX CERAMIC CASE 632-08 The MC54/74HC27 is identical in pinout to the LS27. The device inputs are com­ patible with standard C M O S outputs; with pullup resistors, they are compatible with

74hc273

Abstract: harris hct273
Contextual Info: [ /Title CD74 HC273 , CD74 HCT27 3 /Subject (High Speed CMOS Logic Octal DType Flip- CD54/74HC273, CD54/74HCT273 Data sheet acquired from Harris Semiconductor SCHS174A High Speed CMOS Logic Octal D-Type Flip-Flop with Reset February 1998 - Revised May 2000

Contextual Info: 74HC27; 74HCT27 Triple 3-input NOR gate Rev. 03 — 7 January 2008 Product data sheet 1. General description The 74HC27; 74HCT27 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL LSTTL . The 74HC27; 74HCT27 provides the 3-input NOR function.

74HC273

Abstract: 74HCT273
Contextual Info: G E SOLI» STATE 01 D E | 3Û7S0Ô1 001175=1 4 Technical Data. T-46-07-05 CD54/74HC273 CD54/74HCT273 File Number 1479 High-Speed CMOS Logic Octal D Flip-Flop with Reset Type Features: • Common clock and asynchronous master reset ■ Positive-edge triggering

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HC27 Triple 3-In p u t NOR Gate High-Performance Silicon-Gate CMOS J SUFFIX CERAMIC CASE 632-08 The M C 5 4 /7 4 H C 2 7 is identical in pinout to the LS27. The device inputs are com ­ patible w ith standard C M O S outputs; w ith pullup resistors, they are com patible with

74hc273a

Abstract: 74HC273
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA O ctal D Flip-Flop w ith Common Clock and Reset M C54/74HC273A High-Performance Silicon-Gate CMOS J SUFFIX CERAMIC PACKAGE CASE 732-03 The MC54/74HC273A is identical in pinout to the LS273. The device inputs are compatible with standard CMOS outputs; with pullup resistors,

74hc273a

Abstract: 74hc273 ls273
Contextual Info: MOTOROLA SC LOGIC m blE V b3b?2S2 GD'U'U? 643 M M O T M MOTOROLA / " V ó - o 7 _ // SEMICONDUCTOR! TECHNICAL DATA MC54/74HC273A Octal D Flip-Flop with Common Clock and Reset High-Performance Silicon-Gate CMOS The MC54/74HC273A is identical in pinout to the LS273. The device inputs

74HC27

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HC27 Triple 3-In p u t NOR Gate High-Performance Silicon-Gate CMOS J SUFFIX CERAMIC CASE 632-08 The MC54/74HC27 is identical in pinout to the LS27. The device inputs are com ­ patible w ith standard CMOS outputs; w ith pullup resistors, they are compatible w ith

C273A

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Octal D Flip-Flop w ith Common Clock and Reset MC54/74HC273A High-Performance Silicon-Gate CMOS The MC54/74HC273A is identical in pinout to the LS273. The device inputs are compatible with standard CMOS outputs; with pullup resistors,

Contextual Info: GD54/74HC273, GD54/74HCT273 OCTAL D-TYPE FLIP-FLOPS WITH COMMON CLOCK & CLEAR General Description These devices are identical in pinout to the 5 4 /7 4 L S 2 7 3 . They consist of eight master/slave D- Pin Configuration type flip-flops with a common Clock and common

Contextual Info: [ /Title CD74 HC27, CD74 HCT27 /Subject (High Speed CMOS Logic CD54/74HC27, CD54/74HCT27 Data sheet acquired from Harris Semiconductor SCHS132A High Speed CMOS Logic Triple 3-Input NOR Gate August 1997 - Revised May 2000 Features Description • Buffered Inputs

74HC27

Contextual Info: Technical Data CD54/74HC27 CD54/74HCT27 File Number 1648 High-Speed CMOS Logic - V cc Triple 3-Input NOR Gate Type Features: • Buffered Inputs ■ Typical CD54/74HC27 Propagation Delay = 7ns @ l/cc = 5v, CL= 15pF. Ta = 25° C FUNCTIONAL DIAGRAM AND TERMINAL ASSIGNMENT

74HC273

Abstract: 74hct273 74LS273 74HC GD74HC273 pin diagram of 74ls273 GD74HC27 OT273
Contextual Info: GD54/74HC273, GD54/74HCT273 OCTAL D-TYPE FLIP-FLOPS WITH COMMON CLOCK & CLEAR General Description These devices are identical in pinout to the 5 4 /7 4 L S 2 7 3 . They consist of eight master/slave D- Pin Configuration type flip-flops with a common Clock and common

74HC273

Abstract: 74hct273
Contextual Info: [ /Title CD74 HC273 , CD74 HCT27 3 /Subject (High Speed CMOS Logic Octal DType Flip- CD54/74HC273, CD54/74HCT273 Data sheet acquired from Harris Semiconductor SCHS174A High Speed CMOS Logic Octal D-Type Flip-Flop with Reset February 1998 - Revised May 2000

Contextual Info: GD54/74HC27, GD54/74HCT27 TRIPLE 3-INPUT NOR GATES General Description Pin Configuration These devices are identical in pinout to the 5 4 /7 4 L S 2 7 . They contain three independent 3-input NOR gates. These devices are characteriz­ ed for operation over wide temperature ranges to

74hc273

Abstract: 54HC273 74HCT273
Contextual Info: Technical Data, CD54/74HC273 CD54/74HCT273 File Number 1479 High-Speed CMOS Logic Octal D Flip-Flop with Reset Type Features: • Comm on clock and asynchronous master reset • Positive-edge triggering ■ Buffered inputs ■ Typical fm,K = 60 M H z 'SET

74HC273

Abstract: HCT273 74HC273N TSSOP20 Package 74HCT273 SO20 Package SSOP20 package 74HC273BQ 74HC273D 74HC273DB
Contextual Info: 74HC273; 74HCT273 Octal D-type flip-flop with reset; positive-edge trigger Rev. 03 — 24 January 2006 Product data sheet 1. General description The 74HC273; 74HCT273 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL .

Contextual Info: [ /Title CD74 HC27, CD74 HCT27 /Subject (High Speed CMOS Logic CD54/74HC27, CD54/74HCT27 Data sheet acquired from Harris Semiconductor SCHS132A High Speed CMOS Logic Triple 3-Input NOR Gate August 1997 - Revised May 2000 Features Description • Buffered Inputs

74hc273a

Abstract: 74HC273 MC54/74HC273A LS273 MC54HCXXXAJ MC74HCXXXAN MC54-74HC273A
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA O ctal D Flip-Flop w ith Common Clock and Reset MC54/74HC273A High-Performance Silicon-Gate CMOS J SUFFIX CERAMIC PACKAGE CASE 7 3 2 -0 3 The MC54/74HC273A is identical in pinout to the LS273. The device inputs are compatible with standard CMOS outputs; with pullup resistors,

74HC27

Abstract: C9018 Y33A
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C54/74HC27 Triple 3 -In p u t NOR G ate High-Performance Silicon-Gate CMOS The MC54/74HC27 is identical in pinout to the LS27. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are

DL129

Abstract: LS27 MC54HCXXJ MC74HCXXD MC74HCXXN 74hc27d
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HC27 Triple 3-Input NOR Gate High–Performance Silicon–Gate CMOS The MC54/74HC27 is identical in pinout to the LS27. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HC27 Triple 3-Inp u t NOR Gate High-Performance Silicon-Gate C M O S J SUFFIX CERAMIC CA SE 632-08 T h e M C 5 4 / 7 4 H C 2 7 is identical in p ino ut to the L S 2 7 . T h e device in p u ts are c o m ­ patible w ith sta nda rd C M O S outputs; w ith pullup resistors, th e y are com patible w ith