74FO Search Results

74FO4

Abstract: ds1010-100 74LS DS1010 DS1010-125 DS1010-150 DS1010-50 DS1010-60 DS1010-75 DS1010-80
Contextual Info: DS1010 10-Tap Silicon Delay Line www.dalsemi.com FEATURES All-silicon time delay 10 taps equally spaced Delays are stable and precise Leading and trailing edge accuracy Delay tolerance ±5% or ±2 ns, whichever is greater Economical Auto-insertable, low profile

74fo4

Abstract: 3930k TRS jack RG-58C 3933a m365 DC Power Jack CON 3930A FRDT07 330 792e
Contextual Info: Model 3930A Multifunction Synthesizer Operator’s Manual Contains Operating and Servicing Information WARRANTY Keithley Instruments, Inc. warrants this product to be free from defects in material and workmanship for a period of 1 year from date of shipment.

Contextual Info: Features • High Performance, Low Power AVR 8-Bit Microcontroller • Advanced RISC Architecture • • • • • • • – 130 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation

SA15-5850-01

Abstract: SA15-5850 E2p 28 transistor E2p 93 transistor IBM ASIC databook SA-27E sbc b010 DMA2PLB4
Contextual Info: IBM Title Page DMA to PLB4 DMA2PLB4 User’s Manual (Revised Edition) SA15-5850-01 Version 5.1 December 22, 2005 IBM Copyright and Disclaimer Copyright International Business Machines Corporation 2002, 2005 All Rights Reserved First Edition published 2002. Revised Edition printed in the United States of America December, 2005.

pari

Abstract: 6450V 74fo
Contextual Info: Features • High Performance, Low Power AVR 8-Bit Microcontroller • Advanced RISC Architecture • • • • • • • – 130 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation

DS1010-500

Abstract: 56-G4009-001B 74FO4 DS1010-125
Contextual Info: DS1010 10-Tap Silicon Delay Line www.dalsemi.com FEATURES All-silicon time delay 10 taps equally spaced Delays are stable and precise Leading and trailing edge accuracy Delay tolerance ±5% or ±2 ns, whichever is greater Economical Auto-insertable, low profile

74ls gate symbols

Abstract: 74FO4 pin diagram of 74LS "Delay Lines" 74ls series 74LS SERIES cmos logic data DS1010-60 74LS series datasheet 74ls series logic DS1010-200
Contextual Info: DS1010 DS1010 10-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay IN1 1 14 VCC NC 2 13 TAP 1 IN 1 16 VCC TAP 2 3 12 TAP 3 NC 2 15 NC • Leading and trailing edge accuracy TAP 4 4 11 NC TAP 2 3 14 TAP 5 TAP 1 • Delay tolerance ±5% or ±2 ns, whichever is greater

Contextual Info: IME D INTEGRATED DEVICE • 4ÖSS771 0004203 7 ■ FAST CMOS OCTAL TRANSCEIVER/ REGISTER PRELIMINARY IDT 54/74FCT646/A IDT 54/74FCT648/A T-5Z'3\ FEATURES: DESCRIPTION: • IDT54/74FCT646 and IDT54/74FCT648 equivalent to F A S T " T he IDT54/74FCT646/A and IDT54/74FCT648/A consist Of a

XA 3648

Abstract: t3646
Contextual Info: 3.3V CMOS OCTAL TRANSCEIVER/ REGISTERS 3-STATE Integrated Device Technology, Inc. FEATURES: • 0.5 MICRON CMOS Technology • ESD > 2000V per MIL-STD-8B3, Method 3015; > 200V using machine model (C = 200pF, R = 0) • 25 mil Center SSOP Packages • Extended commercial range of -4 0 °C to +85°C

74LS

Abstract: DS1010 DS1010-100 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S ds1010-500
Contextual Info: DS1010 DS1010 10-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay IN1 1 14 VCC NC 2 13 TAP 1 IN 1 16 VCC TAP 2 3 12 TAP 3 NC 2 15 NC • Leading and trailing edge accuracy TAP 4 4 11 NC TAP 2 3 14 TAP 5 TAP 1 • Delay tolerance ±5% or ±2 ns, whichever is greater

Contextual Info: National Semiconductor 54F/74F00 Quad 2-Input NAND Gate General Description Features This device contains four independent gates, each of which performs the logic NAND function. • Guaranteed 4000V minimum ESD protection Ordering Code: see section 11 Commercial

DS1110-500

Abstract: 74LS DS1010 DS1110 DS1110E J-STD-020A
Contextual Info: Rev 0; 6/02 10-Tap Silicon Delay Line The DS1110 delay line is an improved replacement for the DS1010. It has ten equally spaced taps providing delays from 5ns to 500ns. The devices are offered in a standard 14-pin DIP, 16-pin SO, or 14-pin TSSOP. The DS1110 series delay lines provide a nominal accuracy of

74LS

Abstract: DS1000 MXD1000 MXD1000PA MXD1000PD MXD1000SA MXD1000SE MXD1000UA
Contextual Info: 19-1310; Rev 0; 10/97 5-Tap Silicon Delay Line _Applications _Features ♦ Improved Second Source to DS1000 ♦ Available in Space-Saving 8-Pin µMAX Package ♦ 20mA Supply Current vs. Dallas’ 35mA ♦ Low Cost

74FO4

Contextual Info: 19-1309; Rev 0; 10/97 5-Tap Silicon Delay Line _Features ♦ Improved Second Source to DS1005 ♦ Available in Space-Saving 8-Pin µMAX Package ♦ 17mA Supply Current vs. Dallas’ 40mA ♦ Low Cost ♦ Delay Tolerance of ±2ns or ±3%, whichever is

Contextual Info: Features • High Performance, Low Power AVR 8-Bit Microcontroller • Advanced RISC Architecture • • • • • • • – 130 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation

ds1010-100

Abstract: 74LS DS1010 DS1010-125 DS1010-150 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S
Contextual Info: DS1010 10-Tap Silicon Delay Line www.dalsemi.com FEATURES All-silicon time delay 10 taps equally spaced Delays are stable and precise Leading and trailing edge accuracy Delay tolerance ±5% or ±2 ns, whichever is greater Economical Auto-insertable, low profile

13.824 CRYSTAL

Contextual Info: Features • High Performance, Low Power AVR 8-Bit Microcontroller • Advanced RISC Architecture • • • • • • • – 130 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation

Contextual Info: Features • High Performance, Low Power AVR 8-Bit Microcontroller • Advanced RISC Architecture • • • • • • • – 130 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation

transistor C3866

Abstract: Zener PH SEC E13009 ups circuit schematic diagram 1000w E13007 2 E13007 C3866 power transistor texas ttl 74L505 Transistor C3246
Contextual Info: BID CΚΤ DOLLY L IST L OGO LIST SA F E TY & RELIA ΒL TY ΤΕΚ PIN SYSTE M DIGITA L IC's MEMORIES, MOS CMOS .EC L , TT L MICR OP R OC E SSOR SPE CIA L FUN CTION IC's DIGITAL l LINE AR K ARR AYS LIN E A R IC's (PUR CH ) ΤΕΚ-MADE IC's IC's INDEX (COL ORE D PGS)

74FOO

Contextual Info: TOSHIBA TC74ACT00 Quad 2-Input NAND Gate FEATURES: • High Speed: = 4.0ns typ. at Vcc = 5V • Low Power Dissipation: lcc = 4(iA (max.) at Ta = 25°C • Compatible with TTL Outputs: VIL = 0.8V (max.) ViH = 2.0V (min.) • Symmetrical Output Impedance: llOHl = Io l = 24mA

c5088 transistor

Abstract: transistor C3207 TLO84CN sec c5088 IN5355B D2817A C3207 transistor toshiba f630 TLO81CP MC74HC533N
Contextual Info: Transistor - Diode Cross Reference - H.P. Part Numbers to JEDEC Numbers Part Num. 1820-0225 1820-0240 1820-0352 1820-1804 1821-0001 1821-0002 1821-0006 1850-0062 1850-0064 1850-0075 1850-0076 1850-0093 1850-0099 1850-0126 1850-0137 1850-0150 1850-0151 1850-0154

4101R

Abstract: F4104
Contextual Info: 5.0V HCMOS SMD OSCILLATOR WITH STANDBY F4101 Hi The F4101 Series is our 5.0 Volt version o f the F4100 family. The F4101 provides the power saving standby feature and the low profile package o f the F4100 for those applications requiring 5.0 Volt operation.

4SO16

Abstract: 74FO4 74LS Series IC list DS1110-500 DS1110-50 74LS DS1010 DS1110 DS1110E J-STD-020A
Contextual Info: Rev 1; 11/03 10-Tap Silicon Delay Line The DS1110 delay line is an improved replacement for the DS1010. It has ten equally spaced taps providing delays from 5ns to 500ns. The devices are offered in a standard 16-pin SO or 14-pin TSSOP. The DS1110 series delay lines provide a nominal accuracy of ±5% or ±2ns,

132d

Contextual Info: CY54/74FCT374T CY54/74FCT574T CYPRESS 8-Bit Registers F eatures Sink Current • Function, pinout, and drive compatible with FCT and F logic Source Current • FCT-C speed at 5.2 ns max. Com’l FCT-A speed at 6.5 ns max. (Cnm'l) 64 32 32 12 mA mA mA mA