74ALVCF162835 Search Results

Contextual Info: Revised September 2001 74ALVCF162835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Outputs and 26Ω Series Resistors in Outputs General Description Features The 74ALVCF162835 low voltage 18-bit universal bus driver combines D-type latches and D-type flip-flops to

74ALVCF162835

Abstract: 74ALVCF162835T MTD56
Contextual Info: Revised October 2001 74ALVCF162835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Outputs and 26Ω Series Resistors in Outputs General Description Features The 74ALVCF162835 low voltage 18-bit universal bus driver combines D-type latches and D-type flip-flops to

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Abstract: M390S2950MTU M390S2950MTU-C1H M390S2950MTU-C1L M390S2950MTU-C75 PC133 registered reference design
Contextual Info: Preliminary PC133/100 Low Profile Registered DIMM M390S2950MTU M390S2950MTU SDRAM DIMM 128Mx72 SDRAM DIMM with PLL & Register based on 128Mx4, 4Banks, 8K Ref., 3.3V Synchronous DRAMs with SPD FEATURE GENERAL DESCRIPTION • Performance range The Samsung M390S2950MTU is a 128M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung M390S2950MTU consists of eighteen CMOS 128Mx4 bit

M390S3320DT1-C7A

Abstract: M390S3320DT1 M390S3320DT1-C7C PC133 registered reference design
Contextual Info: PC133 Registered DIMM M390S3320DT1 M390S3320DT1 SDRAM DIMM 32Mx72 SDRAM DIMM with PLL & Register based on 32Mx4, 4Banks 4K Ref., 3.3V Synchronous DRAMs with SPD FEATURE GENERAL DESCRIPTION The Samsung M390S3320DT1 is a 32M bit x 72 Synchronous •Performance range

A115-A

Abstract: C101 SN74ALVCF162835
Contextual Info: 74ALVCF162835 3.3-V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES397A – JULY 2002 – REVISED AUGUST 2004 FEATURES • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family Ideal for Use in PC133 Register DIMM

M390S2858DTU

Abstract: M390S2858DTU-C1H M390S2858DTU-C1L M390S2858DTU-C7A M390S2858DTU-C7C 10D4L PC133 registered reference design
Contextual Info: M390S2858DTU PC133/PC100 Low Profile Registered DIMM M390S2858DTU SDRAM DIMM 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung M390S2858DTU is a 128M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung M390S2858DTU consists of eighteen CMOS Stacked

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Abstract: M390S6450DTU-C7A M390S6450DTU M390S6450DTU-C1H M390S6450DTU-C1L M390S6450DTU-C7C PC133 registered reference design
Contextual Info: M390S6450DTU PC133/PC100 Low Profile Registered DIMM M390S6450DTU SDRAM DIMM 64Mx72 SDRAM DIMM with PLL & Register based on 64Mx4, 4Banks, 8K Ref., 3.3V Synchronous DRAMs with SPD FEATURE GENERAL DESCRIPTION • Performance range The Samsung M390S6450DTU is a 64M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung M390S6450DTU consists of eighteen CMOS 64Mx4 bit

M390S6453DT1

Abstract: M390S6453DT1-C7A M390S6453DT1-C7C PC133 registered reference design
Contextual Info: PC133 Registered DIMM M390S6453DT1 M390S6453DT1 SDRAM DIMM 64Mx72 SDRAM DIMM with PLL & Register based on 32Mx8, 4Banks 8K Ref., 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung M390S6453DT1 is a 64M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung

M390S3253CTU

Abstract: M390S3253CTU-C1H M390S3253CTU-C1L M390S3253CTU-C7A M390S3253CTU-C7C PC133 registered reference design
Contextual Info: M390S3253CTU PC133/PC100 Low Profile Registered DIMM M390S3253CTU SDRAM DIMM 32Mx72 SDRAM DIMM with PLL & Register based on 32Mx8, 4Banks 8K Ref., 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung M390S3253CTU is a 32M bit x 72 Synchronous

M390S3320DT1

Abstract: M390S3320DT1-C7A M390S3320DT1-C7C PC133 registered reference design
Contextual Info: PC133 Registered DIMM M390S3320DT1 M390S3320DT1 SDRAM DIMM 32Mx72 SDRAM DIMM with PLL & Register based on 32Mx4, 4Banks 4K Ref., 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung M390S3320DT1 is a 32M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung

26series

Abstract: hex to 7 segment decoder line driver 74ABT240 74AC240 74AC540 74ACQ240 74ACT1284 DM74145 DM74LS47
Contextual Info: Logic Products by Function Line Driver Products Logic Product Family Product Description Package Voltage Node MM88C29 74C CMOS Quad Single-Ended Line Driver DIP 5 other MM88C30 74C CMOS Dual Differential Line Driver DIP SOIC 5 other DM74LS47 Bipolar-LS BCD to 7-Segment Decoder/Driver

PC133 registered reference design

Contextual Info: M390S0823FT1 PC133 Registered DIMM M390S0823FT1 SDRAM DIMM 8Mx72 SDRAM DIMM with PLL & Register based on 8Mx8, 4Banks 4K Ref., 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung M390S0823FT1 is a 8M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung

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Abstract: PC133 SDRAM registered DIMM 512MB samsung pc133 sdram 512mb ECC unbuffered K4S560832E M390S2858ET1-C7A M390S2858ETU-C7A M390S3253ET1-C7A M390S3253ETU-C7A M390S6450ET1-C7A M390S6450ETU-C7A
Contextual Info: 256MB, 512MB, 1GB Registered DIMM SDRAM SDRAM Registered Module 168pin Registered Module based on 256Mb E-die with 72-bit ECC Revision 1.4 May 2004 * Samsung Electronics reserves the right to change products or specification without notice. Rev. 1.4 May 2004

Contextual Info: 74ALVCF162835 3.3-V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES397A – JULY 2002 – REVISED AUGUST 2004 FEATURES • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family Ideal for Use in PC133 Register DIMM

PC133 registered reference design

Contextual Info: M390S3320BT1 PC133 Registered DIMM Revision History Revision 0.0 Sep. 1999 • PC133 first published REV. 0 Sep. 1999 PC133 Registered DIMM M390S3320BT1 M390S3320BT1 SDRAM DIMM 32Mx72 SDRAM DIMM with PLL & Register based on 32Mx4, 4Banks 4K Ref., 3.3V Synchronous DRAMs with SPD

M390S6450DT1-C7A

Abstract: 0ba0 PC133 registered reference design
Contextual Info: M390S6450DT1 PC133 Registered DIMM M390S6450DT1 SDRAM DIMM 64Mx72 SDRAM DIMM with PLL & Register based on 64Mx4, 4Banks, 8K Ref., 3.3V Synchronous DRAMs with SPD FEATURE GENERAL DESCRIPTION • Performance range The Samsung M390S6450DT1 is a 64M bit x 72 Synchronous

PC133 registered reference design

Contextual Info: PC133 Registered DIMM M390S3320ET1 M390S3320ET1 SDRAM DIMM 32Mx72 SDRAM DIMM with PLL & Register based on 32Mx4, 4Banks 4K Ref., 3.3V Synchronous DRAMs FEATURE GENERAL DESCRIPTION The Samsung M390S3320ET1 is a 32M bit x 72 Synchronous •Performance range

l0203

Contextual Info: Integrated Device Technology, Inc. 2975 Stender Way, Santa Clara, CA - 95054 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: L0203-03 DATE: March 15, 2002 MEANS OF DISTINGUISHING CHANGED DEVICES: Product Affected: 74ALVCF162835 Product Mark IDT74ALVCHS162830, IDTCSP2510

Contextual Info: M390S6450CT1 PC133 Registered DIMM M390S6450CT1 SDRAM DIMM 64Mx72 SDRAM DIMM with PLL & Register based on 64Mx4, 4Banks, 8K Ref., 3.3V Synchronous DRAMs with SPD FEATURE GENERAL DESCRIPTION • Performance range The Samsung M390S6450CT1 is a 64M bit x 72 Synchronous

Contextual Info: M390S2858CT1 PC133 Registered DIMM M390S2858CT1 SDRAM DIMM 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung M390S2858CT1 is a 128M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung M390S2858CT1 consists of eighteen CMOS Stacked

PC133 registered reference design

Abstract: KMM390S3320T1-GA KMM390S3320T1
Contextual Info: KMM390S3320T1 PC133 Registered DIMM Revision History Revision 0.0 May. 1999 • PC133 first published Revision 0.1 (June. 1999) - Redefined feedback capacitor value to Cb, variable value, which depends upon the PLL chosen at Functional Block Diagram - Defined " This module is based on JEDEC PC133 Specification" at Package Dimensions

PC133 registered reference design

Abstract: KMM390S3320AT1
Contextual Info: KMM390S3320AT1 PC133 Registered DIMM Revision History Revision 0.0 May. 1999 • PC133 first published Revision 0.1 (June. 1999) - Redefined feedback capacitor value to Cb, variable value, which depends upon the PLL chosen at Functional Block Diagram - Defined " This module is based on JEDEC PC133 Specification" at Package Dimensions

Contextual Info: 74ALVCF162835 3.3-V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES397A – JULY 2002 – REVISED AUGUST 2004 FEATURES • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family Ideal for Use in PC133 Register DIMM

KMM390S3320BT1-GA

Abstract: PC133 registered reference design
Contextual Info: KMM390S3320BT1 PC133 Registered DIMM Revision History Revision 0.0 Aug. 1999 • PC133 first published REV. 0.0 Aug. 1999 PC133 Registered DIMM KMM390S3320BT1 KMM390S3320BT1 SDRAM DIMM 32Mx72 SDRAM DIMM with PLL & Register based on 32Mx4, 4Banks 4K Ref., 3.3V Synchronous DRAMs with SPD