74LVX02 Search Results

Contextual Info: Revised September 2003 74LVX02 Low Voltage Quad 2-Input NOR Gate ‘ General Description Features The LVX02 contains four 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

74LVX02M

Contextual Info: S E M IC O N D U C T O R 74LVX02 Low Voltage Quad 2-Input NOR Gate General Description Features The LVX02 contains lo u r 2-input NOR gates. T h e inputs to l­ erate voltages up to 7V allow ing the interface of 5V system s to 3V systems. • Input voltage level translation trom 5V to 3V

74LVX02

Abstract: 74LVX02M 74LVX02MTR 74LVX02TTR TSSOP14
Contextual Info: 74LVX02 LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 4.5ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL : VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C

74LVX02

Abstract: 74LVX02MTR 74LVX02TTR TSSOP14
Contextual Info: 74LVX02 LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.5ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL: VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C

74LVX02

Contextual Info: S E M [CONDUCTOR TM 74LVX02 Low Voltage Quad 2-Input NOR Gate General Description Features The LVX02 contains four 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys­ tems to 3V systems. • Input voltage level translation from 5V to 3V

74LVX02

Contextual Info: LVX02 S3 National A M Semiconductor 74LVX02 Low Voltage Quad 2-Input NOR Gate General Description Features The LVX02 contains four 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys­ tems to 3V systems. • Input voltage level translation from 5V to 3V

74LVX02

Abstract: 74LVX02M 74LVX02T TSSOP14
Contextual Info: 74LVX02  LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.5 ns TYP. at VCC = 3.3V INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC = 3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V

74LVX02

Contextual Info: 74LVX02 LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE . HIGH SPEED: tPD = 4.5 ns TYP. at Vcc = 3.3V • INPUT VOLTAGE LEVEL: V il = 0.8V, V ih = 2V at Vcc = 3V ■ LOW POWER DISSIPATION: Icc = 2 |oA (MAX.) at Ta = 25 °C . LOW NOISE: V olp = 0.3 V (TYP.) at Vcc = 3.3V

74LVX02

Abstract: 74LVX02M 74LVX02MTC 74LVX02MTCX 74LVX02SJ M14A M14D MTC14
Contextual Info: Revised February 2005 74LVX02 Low Voltage Quad 2-Input NOR Gate General Description Features The LVX02 contains four 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

74LVX02

Contextual Info: 74LVX02 LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.5ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL: VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C

74LVX02

Abstract: 74LVX02M 74LVX02MTC 74LVX02SJ M14A M14D MTC14 LVX02
Contextual Info: 74LVX02 Low Voltage Quad 2-Input NOR Gate Features General Description • Input voltage level translation from 5V to 3V The LVX02 contains four 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. ■ Ideal for low power/low noise 3.3V applications

74LVX02

Abstract: 74LVX02M 74LVX02MTC 74LVX02SJ M14A M14D MTC14
Contextual Info: Revised March 1999 74LVX02 Low Voltage Quad 2-Input NOR Gate General Description Features The LVX02 contains four 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

74LVX02

Abstract: 74LVX02M 74LVX02MTC 74LVX02MTCX 74LVX02MX 74LVX02SJ 74LVX02SJX M14A M14D 116002
Contextual Info: LVX02 National Semiconductor 74LVX02 Low Voltage Quad 2-Input NOR Gate General Description Features The LVX02 contains four 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys­ tems to 3V systems. • Input voltage level translation from 5V to 3V

74LVX02

Abstract: 74LVX02M 74LVX02MTR 74LVX02TTR TSSOP14
Contextual Info: 74LVX02 LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 4.5ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL : VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C

74LVX02

Abstract: 74LVX02M 74LVX02MTC 74LVX02MTCX 74LVX02MX 74LVX02SJ 74LVX02SJX M14A M14D
Contextual Info: 74LVX02 Low Voltage Quad 2-Input NOR Gate General Description Features The LVX02 contains four 2-input NOR gates The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems Y Y Y Y Logic Symbol Input voltage level translation from 5V to 3V

74LVX02

Contextual Info: 74LVX02 LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE . HIGH SPEED: tPD = 4.5 ns TYP. at Vcc = 3.3V • INPUT VOLTAGE LEVEL: V il = 0.8V, V ih = 2V at Vcc = 3V ■ LOW POWER DISSIPATION: Icc = 2 |oA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0.3 V (TYP.) at Vcc = 3.3V

S-120A

Contextual Info: SEMICONDUCTOR Revised March 1999 TM 74LVX02 Low Voltage Quad 2-Input NOR Gate General Description Features T h e LVX02 contains fo u r 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys­ tem s to 3V system s. • Input voltage level translation from 5V to 3V

d flip flop

Abstract: quad 2-input nand schmitt trigger 74LVX00 74LVX02 74LVX04 74LVX08 74LVX112 74LVX125 74LVX132 74LVX14
Contextual Info: Logic Products by Family LVX Low Voltage Products Logic Product Function Product Description Package Voltage Node 74LVX00 Gate Low Voltage Quad 2-Input NAND Gate SOIC SOP TSSOP 2.7 3.3 74LVX02 Gate Low Voltage Quad 2-Input NOR Gate SOIC SOP TSSOP 2.7 3.3

Contextual Info: M OTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2 -In p u t NOR G ate M C 74LVX02 With 5V -Tolerant Inputs The 74LVX02 is an advanced high speed CMOS 2-input NOR gate. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.

Contextual Info: 74LVX02 Low Voltage Quad 2-Input NOR Gate Features General Description • Input voltage level translation from 5V to 3V The LVX02 contains four 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. ■ Ideal for low power/low noise 3.3V applications

74LVX02

Abstract: 74LVX02M 74LVX02MTC 74LVX02SJ M14A M14D MTC14
Contextual Info: S E M IC O N D U C T O R tm 74LVX02 Low Voltage Quad 2-Input NOR Gate General Description Features The LVX02 contains four 2-input N OR gates. The inputs to l­ erate voltages up to 7V allowing th e interface of 5V system s to 3 V system s. • Input voltage level translation from 5V to 3V

74LVX02

Abstract: 74LVX02M 74LVX02MTC 74LVX02SJ M14A M14D MTC14
Contextual Info: Revised September 2003 74LVX02 Low Voltage Quad 2-Input NOR Gate General Description Features The LVX02 contains four 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

74LVX02

Abstract: 74LVX02M 74LVX02MTC 74LVX02SJ M14A M14D MTC14
Contextual Info: 74LVX02 Low Voltage Quad 2-Input NOR Gate General Description Features The LVX02 contains four 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. n Input voltage level translation from 5V to 3V n Ideal for low power/low noise 3.3V applications

TTL 74-series IC LIST

Abstract: 74 Series Logic ICs TTL 74-series IC PO74G74 PO74G04 list cmos ics 49fct32805 49FCT3807 Potato Semiconductor 49FCT3805
Contextual Info: 04/18/07 Pin to Pin & Package to Package Compatible IC List Standard 1.65V -3.6 V TTL / CMOS Clock Buffer PotatoSemi PO49FCT3802A 1GHz 1 to 5 PO49FCT3803B 700MHz 1 to 7 PO49FCT3804 800MHz 2X1 to 4 PO49FCT3805B 800MHz 2X1 to 5 PO49FCT3806 750MHz 2X1 to 5 PO49FCT3807B