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    7486 GATE Search Results

    7486 GATE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    54AC00/SDA-R
    Rochester Electronics LLC 54AC00 - NAND Gate, AC Series, 4-Func, 2-Input, CMOS - Dual marked (M38510R75001SDA) PDF Buy
    5410/BCA
    Rochester Electronics LLC 5410 - NAND GATE, TRIPLE 3-INPUT - Dual marked (M38510/00103BCA) PDF Buy
    54S133/BEA
    Rochester Electronics LLC 54S133 - NAND GATE, 13-INPUT - Dual marked (M38510/07009BEA) PDF Buy
    54ACTQ32/QCA
    Rochester Electronics LLC 54ACTQ32 - OR Gate, ACT Series, 4-Func, 2-Input, CMOS, - Dual marked (5962-8973601CA) PDF Buy
    5409/BCA
    Rochester Electronics LLC 5409 - AND GATE, QUAD 2-INPUT, WITH OPEN-COLLECTOR OUTPUTS - Dual marked (M38510/01602BCA) PDF Buy

    7486 GATE Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    TTL 7486

    Abstract: 74 LS 00 Logic Gates 7486 TTL 74LS86 TTL ls 7486 TTL 7486 AND propagation delay
    Contextual Info: Signetics I 7486, LS86, S8Ó Gates Quad Two-Input Exclusive-OR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7486 14ns 30mA 74LS86 10ns 6.1mA 74S86 7ns 50mA ORDERING CODE COMMERCIAL RANGE V cc = 5 V + 5 % ; T a = 0°C to +70°C


    OCR Scan
    74ls8674s86n7486nn74ls86n+11n74s86nn74ls86dn74s86d40/navm15pffttl 748674 ls 00 logic gates7486 ttl74ls86 ttlls 7486ttl 7486 and propagation delay PDF

    7486 XOR GATE pin configuration

    Contextual Info: The Leader in High Temperature Semiconductor Solutions CHT-7486 DATASHEET Revision: 03.3 Oct. 01, 2012 Last Modified Date High-Temperature, Quad 2-Inputs XOR Gate General Description Features The CHT-7486 contains four independent 2-inputs XOR gates, performing the Boolean function :


    Original
    cht-7486cdil14csoic16ds-080208+17486 xor gate pin configuration PDF

    ttl 7486

    Abstract: 7486 pin configuration TTL 7486 AND propagation delay 7486 TTL pin configuration 7486 74LS86 fan-out 7486 signetics pin configuration of 7486 7486 signetics TTL TTL 74ls86
    Contextual Info: Signetics I 7486, LS86, S86 Gates Quad Two-Input Excluslve-OR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7486 14ns 30mA 74LS86 10ns 6.1mA 74S86 7ns 50mA TYPE ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; T a = 0”C to + 70”C


    OCR Scan
    74ls8674s86n7486nn74ls86n+14n74s86nn74ls86dn74s86df07570sttl 74867486 pin configurationttl 7486 and propagation delay7486 ttlpin configuration 748674ls86 fan-out7486 signeticspin configuration of 74867486 signetics ttlttl 74ls86 PDF

    7486 pin configuration

    Abstract: 74LS 7486 TTL 7486 7486 TTL 7486 signetics
    Contextual Info: Signetics I 7486, LS86, S86 Gates Quad Two-Input Exclusive-OR Gate Product Specification Logic Products TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY TYPE 7486 14ns 30mA 74LS86 10ns 6.1mA 74S86 7ns 50mA ORDERING CODE COMMERCIAL RANGE VCc = 5V ±5% ; T A = 0°C to + 70°C


    OCR Scan
    74ls8674s86n7486nn74ls86n+9n74s86nn74ls86dn74s86d40jua7486 pin configuration74ls 7486ttl 74867486 ttl7486 signetics PDF

    TTL 7486

    Abstract: 7486 7486 TTL chip 7486 7486 gate 9N86/7486 9n86 TTL 7486 fairchild TTL family 7486 FAIRCHILD
    Contextual Info: FAIRCHILD TTL/SSI . 9N86/5486, 7486 QUAD 2-INPUT EXCLUSIVE OR GATE DESCRIPTION - The TTL/SSI 9 N 8 6 /54 8 6 , 7486 is a Quad 2-input Exclusive OR gate designed to perform the function: Y = AB + AB. When the input states are complementary, the output goes to the HIGH level.


    OCR Scan
    9n86/54869n86/7486ttl 74867486+77486 ttlchip 74867486 gate9n86ttl 7486 fairchildttl family7486 fairchild PDF

    TTL 7486

    Abstract: 74LS86 pin configuration N74LS86N 7486 signetics 74ls ttl 132 74ls86 74LS 74S86 LS86 N7486N
    Contextual Info: Signelics I 7486, LS86, S86 Gates Quad T w o-Inp ut Exclusive-OR Gate Product Specification L o gic P roducts TY PE T Y P IC A L P R O P A G A TIO N DELAY T Y P IC A L SU P P LY C U R R E N T T O T A L 7486 14ns 30m A 74LS86 10ns 6.1m A 74S 86 7ns 50m A


    OCR Scan
    74ls8674s86n7486nn74ls86n+12n74s86nn74ls86dn74s86d10sul10lsulwf07570sttl 748674ls86 pin configuration7486 signetics74ls ttl 13274lsls86 PDF

    TTL 7486

    Abstract: 7486 TTL 7486 PIN CONFIGURATION pin configuration of 7486 7486 7486 signetics pin configuration 7486 LS86 74ls gate symbols 74ls ttl 132
    Contextual Info: Signefics I 7486, LS86, S86 Gates Quad Two-Input Exclusive-OR Gate Product Specification Logic Products T Y P IC A L PR O P A G A TIO N D E LA Y TYPE T Y P IC A L SU PP LY C U R R E N T T O T A L 7486 14ns 30m A 74LS86 10ns 6.1m A 74S 86 7ns 50m A ORDERING CODE


    OCR Scan
    74ls8674s86n7486nn74ls86n+16n74s86nn74ls86dn74s86d10sul10lsulwf07580sttl 74867486 ttl7486 pin configurationpin configuration of 748674867486 signeticspin configuration 7486ls8674ls gate symbols74ls ttl 132 PDF

    connection diagram IC 7486

    Abstract: function table IC 7486 function OF IC 7486 7486 gate ic 7486 logic symbol DIAGRAM OF IC 7486 logic diagram of ic 7486
    Contextual Info: NATIONAL SEMICOND {LOGIC} bSQÌ122 0Q7QS13 3 31E D T -M 3 -I Ä -oo National Semiconductor 5486/DM 5486/DM 7486 Quad 2-Input Exclusive-OR Gates General Description Features This device contains four independent gates each of which performs the logic exclusivs-OR function.


    OCR Scan
    0q7qs135486/dmtuf/6s31-15486dmqb+125486fmqbdm5486jdm5486wdm7486nsail52connection diagram ic 7486function table ic 7486function of ic 74867486 gateic 7486 logic symboldiagram of ic 7486logic diagram of ic 7486 PDF

    74LS86A

    Abstract: 7486N 54LS86a 54LS88A
    Contextual Info: TYPES SN7486, SN74LS86A, SN74S86 SN5486, SN54LS86A, SN54S86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES DECEMBER 1972 - REVISED MARCH 1988 • P ackage O p tion s In clud e P lastic “Sm all SN5486, SNS4LS86A, SN 54S 86. J PACKAGE S N 7486. N PACKAGE SN74LS86A, SN74S86 . D OR N PACKAGE


    OCR Scan
    sn7486sn74ls86asn74s86sn5486+8sn54ls86asn54s86300-milsns4ls86a74ls86a7486n54ls86a54ls88a PDF

    7486PC

    Abstract: 74LS86PC
    Contextual Info: 86 CONNECTION DIAGRAM PINOUT A v£4/7486 J/S4S/74S86 0 / / ^ 7 6 V54LS/74LS86 o / / 1 1 < - { QUAD 2-INPUT EXCLUSIVE-OR GATE ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%, T a = 0°C to +70°C Vcc = +5.0 V ±10%,


    OCR Scan
    j/s4s/74s86v54ls/74ls867486pc74s86pc+674ls86pc7486dc74s86dc74ls86dc5486dm54s86dm PDF

    74LS86PC

    Abstract: 74LS86 fan-out 7486 pinout 74LS86p 74LS86 gate diagram 7486PC 74LS86 74ls86 pin diagram 74s86 gate 74LS86FC
    Contextual Info: NATIONAL SEHICOND -CLOGIO 05E D I b501152 00^3731 S I , r-Y&s* 86 CONNECTION DIAGRAM PINOUT A 54/7486 54S/74S86 54LS/74LS86 QUAD 2-INPUT EXCLUSIVE-OR GATE Q [1•' "'jj □ [I [I F G ORDERING CODE: See Section 9 PIN PKGS COMMERCIAL GRADE Vcc = +5.0 V ±5%,


    OCR Scan
    b50115254s/74s8654ls/74ls867486pc+1474s86pc74ls86pc7486dc74s86dc74ls86dc7486fc74ls86 fan-out7486 pinout74ls86p74ls86 gate diagram74ls8674ls86 pin diagram74s86 gate74ls86fc PDF

    74LS86PC

    Abstract: 74LS86p 7486 pinout 7486PC pin diagram of 7486 74S86PC 74LS86 gate diagram t3d7 diode 74LS86 74ls86 pin diagram
    Contextual Info: 86 CONNECTION DIAGRAM PINOUT A vè4/7486 £,^ ò ~7 / ^S4S/74S86 O f l ù V54LS/74LS86 o / / b i < j QUAD 2-IN PU T EXCLUSIVE-OR GATE ORDERING CODE: See Section 9 PIN PKGS O UT COMMERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%, T a = 0°C to +70° C Vcc = +5.0 V ±10%,


    OCR Scan
    s4s/74s86v54ls/74ls867486pc74s86pc+1374ls86pc7486dc74s86dc74ls86dc5486dm54s86dm74ls86p7486 pinoutpin diagram of 748674ls86 gate diagramt3d7 diode74ls8674ls86 pin diagram PDF

    74573

    Abstract: 74574 7486 XOR GATE 7486 full adder latch 74574 7408, 7404, 7486, 7432 7490 Decade Counter 74373 cmos dual s-r latch 2 bit magnitude comparator using 2 xor gates design a BCD counter using j-k flipflop
    Contextual Info: Semiconductor Logic Device Cross-Reference Here is a comprehensive cross-reference of TTL and CMOS chips that are readily available over the counter from such places as Maplin Electronics in the UK . Tables of both TTL and CMOS devices are provided along with tables grouping chips with the same functionality together.


    Original
    74573745747486 xor gate7486 full adder+6latch 745747408, 7404, 7486, 74327490 decade counter74373 cmos dual s-r latch2 bit magnitude comparator using 2 xor gatesdesign a bcd counter using j-k flipflop PDF

    CI 74LS08

    Abstract: 7432 TTL fairchild TTL 7421 74LS21 ttl 7432 TTL 74ls32 TTL 7409 TTL 7486 TTL 74ls86 TTL 7432 fairchild
    Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L-T T L D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi


    OCR Scan
    54h/74h0854s/74s0854ls/74ls0854s/74s09+1654ls/74ls0954h/74h2154ls/74ls2154s/74s3254ls/74ls3254h/74h11ci 74ls087432 ttl fairchildttl 742174ls21ttl 7432ttl 74ls32ttl 7409ttl 7486ttl 74ls86ttl 7432 fairchild PDF

    7408 DIP

    Abstract: 7404 inverter 7400 DIP 7404 dip 7408 7402 nand 7404 hex inverter 7404 7408 and T7430
    Contextual Info: BIPOLAR DIGITAL ICs continued TYPE T T L - T 7 4 , T 54 series" z o 1Q. C TJ a. 5 B O- OC O I=3 O z < ÜJ ID < u < Q- C/3 LU O Gates T 7400/5400 Quad 2-input N A N D 10 40 10 D IP H,P T 7401/5401 Quad 2-input open-collector N A N D 10 40 10 D IP H,P T 7402/5402


    OCR Scan
    7408 dip7404 inverter7400 dip7404 dip+674087402 nand7404 hex inverter74047408 andt7430 PDF

    logic diagram of 7432

    Abstract: CI 7408 TTL 7486 7408 s.i 7408 FL 9014 7486 nor CI 74LS08 7408 fairchild 7432 TTL
    Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi Fai np f i ! Föi lyi rn


    OCR Scan
    54h/74h0854s/74s0854ls/74ls0854s/74s09+1654ls/74ls0954h/74h2154ls/74ls2154s/74s3254ls/74ls3254h/74h11logic diagram of 7432ci 7408ttl 74867408 s.i7408fl 90147486 norci 74ls087408 fairchild7432 ttl PDF

    7404 dip

    Abstract: 7493 4 bit binary counter 4 nand dip 16 74122 Retriggerable Monostable Multivibrator Noise immunity of 7408 7476 counter CI 7405 Noise immunity of 7486 decade counter 7492 7492 binary counter
    Contextual Info: BIPOLAR DIGITAL ICs continued TYPE T T L - T 7 4 , T 54 series" z o 1Q. C TJ a. 5 B O- OC O I=3 O z < ÜJ ID < u < Q- C/3 LU O Gates T 7400/5400 Quad 2-input N A N D 10 40 10 D IP H,P T 7401/5401 Quad 2-input open-collector N A N D 10 40 10 D IP H,P T 7402/5402


    OCR Scan
    p4/548416-bitdivide-by-127404 dip+97493 4 bit binary counter4 nand dip 1674122 retriggerable monostable multivibratornoise immunity of 74087476 counterci 7405noise immunity of 7486decade counter 74927492 binary counter PDF

    74LS08 Quad 2-Input AND Gates

    Abstract: TTL 74s32 TTL 7408 or 2 input 74Ls32 74LS11 and 74LS32 74ls32 quad 2-input OR gates 54LS TTL 7421 74LS 3-input NOR 74LS11
    Contextual Info: FAIRCHILD DIGITAL TTL High Speed 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 3 ns/19 mW Logic/Connection Diagram'2’ E £ Std. TTL 54/74 10 ns/10 mW ~c o o c S U. Low Power Schottky 54LS/74LS 5 ns/2 mW Cont’d 9000 Series 8 ns/10 mW SSI FUNCTIONS 5


    OCR Scan
    ns/1054h/74hns/2254s/74s+15ns/1954ls/74ls54ls/74ls0254ls/74ls2754ls/74ls26074ls08 quad 2-input and gatesttl 74s32ttl 7408or 2 input 74ls3274ls11 and 74ls3274ls32 quad 2-input or gates54lsttl 742174ls 3-input nor74ls11 PDF

    CI 7408

    Abstract: 74LS series logic gates CI 7402 TTL 7408 7408 and 7408 TTL CI 74LS08 TTL 7486 7408 CI 74LS86
    Contextual Info: FAIRCHILD DIGITAL TTL Quad 2-Input 9015 3 Triple 3-Input — 4 Dual 4-Input w/Strobe — 5 Dual 4-Input Exp — 6 Dual 5-Input — Logic/Connection Diagram12* 2 High Speed Schottky 54S/74S 3 ns/19 mW — 3 LL High Speed 54H/74H 6 ns/22 mW Quad 2-Input E


    OCR Scan
    ns/1054ls/74ls54h/74hns/22+1554s/74sns/1954ls/74ls0254s/74s0254ls/74ls27ci 740874ls series logic gatesci 7402ttl 74087408 and7408 ttlci 74ls08ttl 74867408ci 74ls86 PDF

    IC 7486

    Abstract: CI 74LS08 TTL 7408 IC TTL 7432 7408 TTL TTL 74ls08 7408 ic diagram IC TTL 7402 IC 7432 74LS32 TTL
    Contextual Info: FA IR C H ILD D IG ITA L TTL High Speed Schottky 54S/74S 3 ns/19 mW Logic/Connection Diagram'2’ S U. High Speed 54H/74H 6 ns/22 mW c B £ Std. TTL 54/74 10 ns/10 mW o o 54/7402 — 54S/74S02 D10 — — — — D11 4L,6B 54LS /74LS 27 54/7427 — — D12


    OCR Scan
    ns/1054ls/74ls54h/74hns/22+1554s/74sns/1954ls/74ls0254s/74s0254ls/74ls27ic 7486ci 74ls08ttl 7408ic ttl 74327408 ttlttl 74ls087408 ic diagramic ttl 7402ic 743274ls32 ttl PDF

    STR W 5453 A

    Abstract: STR 5453 STR W 5453 STR W 5453 C Truth Table 74190 Truth Table 74192 74193 truth table truth table 7454 str w c 5453 Truth Table 74193
    Contextual Info: TTL/MSI 9393/5493, 7493 4 -B IT BINARY COUNTER D E S C R IP T IO N -T h e T T L /M S I 9393/5 4 9 3 , 7493 is a 4-Bit Binary Counter consisting of four master/ slave flip-flops which are internally interconnected to provide a divide-by-two counter and a divide-by-eight counter. A gated direct reset line is provided which inhibits the count inputs and


    OCR Scan
    74h00str w 5453 astr 5453str w 5453+7str w 5453 ctruth table 74190truth table 7419274193 truth tabletruth table 7454str w c 5453truth table 74193 PDF

    FZH115B

    Abstract: fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104
    Contextual Info: Digital I.C.s, 74INTEGRATED CIRCUITS DIGITAL TTL, 74LS & 74HC Series Quad 2-input NAND gate Quad 2-input NAND gate, open collector Quad 2-input NOR gate Quad 2-input NOR gate, open collector Hex inverter Hex inverter, O/C collector Hex inverter, Buffer 30V O/P


    Original
    74integratedline-to-10150ns16-dil+1318-pin250ns300nsfzh115bfzh261fzk105fzh131fzj111fzh115fzh205multiplexer ic 74151fzh265b74ls104 PDF

    7411 pin diagram

    Abstract: TTL 7408 DS 7409 74LS574 CI 7408 7407 connection diagram 74LS386 TTL 7408 DIAGRAMS 74LS08 PIN CI 74LS08
    Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D93 54LS/74LS379 D94 9386, 74LS266, 54LS/74LS386 D95 54LS/74LS398 r ei fi r E5i r?i n Vcc 1 4 5 12 13 4 5 7 6 14 15 17 16 lOa Ila lo b lib lo c lie lo d lid S CP Qa Qb 2 GND Vcc = Pin 20 GND = Pin 10 Vcc = Pin 16


    OCR Scan
    54ls/74ls37974ls26654ls/74ls38654ls/74ls398+1654ls/74ls39954ls/74ls57454ls/74lss02o04s0954ls/74ls1154h/74h117411 pin diagramttl 7408ds 740974ls574ci 74087407 connection diagram74ls386ttl 7408 diagrams74ls08 pinci 74ls08 PDF

    TTL LS 7407

    Abstract: CI 7407 CI 7402 TTL LS 7402 ls 7408 TTL 74s02 CI 74LS02 74LS27 TTL 7425 TTL 74ls02
    Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D7 54/7430, 54H/74H30 54S/74S30, 54LS/74LS30 Vcc NC r r r NC r D8 54S/74S133, 54LS/74LS133 D9 54S/74S134 Vcc NC r fi fi Ili ill HI Li Lil lil GND LzJ R R R R F IR R F I E RRRRRRRFl li lli lli lli J lill ill ill iJGND


    OCR Scan
    54h/74h3054s/74s3054ls/74ls3054s/74s133+1654ls/74ls13354s/74s13454s/74s0254ls/74ls0254ls/74ls2874ls33ttl ls 7407ci 7407ci 7402ttl ls 7402ls 7408ttl 74s02ci 74ls0274ls27ttl 7425ttl 74ls02 PDF