74280 Search Results

74280

Abstract: Parity Generators
Contextual Info: - 74280 9-Bit Parity Generators/Checkers 189-

Venice 6.2 internet radio module

Contextual Info: WiFly Command Reference, Advanced Features and Applications User’s Guide  2014 Microchip Technology Inc. DS50002230A Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet.

74590

Abstract: 74285 pico electronics transformers 74115 74240 74220 74210 74035 74515 74565
Contextual Info: Pulse Transformers - Plug-In Specifications Units manufactured to MIL-PRF-21038. z DIELECTRIC STRENGTH: All units tested at 500 V RMS. z INSULATION RESISTANCE: Greater than 10,000 Megohms at 700 V DC. z THERMAL SHOCK: 25 Cycles, Method 107, MIL-STD-202, Test Condition -55

Contextual Info: M odular PCB Terminal Blocks, Series 742 Pin spacing 5 mm/0.197 in and 5.08 m m /0.2 in 30 Front-entry Pin spacing 5 mm/0.197 in grey 0.08 - 2 .5 m m A W G 28 - 1 2 2 5 0 V /4 kV / 3 ,16 A 5 00 V /4 kV / 2 ,16 A 4_E23i 8 — y mm / 0.33 in Colour Item-No.

7486 XOR gate

Abstract: 8mcomp XOR 7486 Truth Table 74192 4count XOR 7486 GATE 16cudslr 7472 truth table 7486 xor 74194 truth table
Contextual Info: PROGRAMMABL E a \ l o g ic s o f t w a r e I-WV i1 I— rT -U U PLS-MAX =Er - ]T — n V n i n ni l A V P L S -m A X MAX+PLUS FEATURES GENERAL DESCRIPTION • Unified Development system for the entire Multiple Array Matrix MAX family of EPLDs. • Multiple design entry methods including a hier­

TTL 74139

Abstract: 74153 mux MSI 74148 16cudslr CI 74138 sn 74373 8mcomp 7404 7408 7432 7408, 7404, 7486, 7432 Flip-Flop 7471
Contextual Info: PLSLIB-TTL /$ ^ n^ X LIBRARY • TTL MacroFunction Library Diskette. • ADLIB, Altera Design Librarian Diskette. To increase design ease and productivity Altera has created M acroFunctions. These are high level building blocks that allow the user to design at

74138n

Abstract: buffer 74374 74373 cmos dual s-r latch of IC 74191 G701
Contextual Info: • GENERAL DESCRIPTION T h e M S M 7 0 H 0 0 0 series is the gate array LSI based on the m aster slice m e th o d using the high p erfo rm a n c e silicon gate 2 m ic ro n H C M O S process w ith th e d u a l-la y e r m etal structure. T h is series has th e features to easily realize fu n c tio n s o f th e s c h m itt trigger, c ry s ta l/

counter 74168

Abstract: 3-8 decoder 74138 counter 74169 Multiplexer 74152 74183 adder 74381 alu 74169 binary counter 74151 8 by 1 Multiplexer flip flop 74379 74175 flip flops
Contextual Info: • GENERAL DESCRIPTION T h e M S M 7 0 V 0 0 0 series is the gate array LSI based on the m aster slice m e th o d using the high p erfo rm an ce silicon gate 1.5 m ic ro n H C M O S process w ith th e d u a l-la y e r m etal structure. T h is series has th e features to easily realize fu n c tio n s o f th e s c h m itt trigger, c ry s ta l/

74ls82

Abstract: 74245 BIDIRECTIONAL BUFFER IC 74ls150 ph 4531 diode 4583 dual schmitt trigger ic D flip flop 7474 74245 BUFFER IC ic 7483 BCD adder data sheet ic 74139 Quad 2 input nand gate cd 4093
Contextual Info: General Features The SCxD4 series of high perform ance CM O S gate arrays offers the user the ability to realise custom ised VLSI inte­ grated circuits featuring the speed perform ance previously obtainable only with bipo lar tech nolog ies whilst retaining all

7408, 7404, 7486, 7432 use NAND gate

Abstract: JLCC-68 ci 74386 cI 74150 jLCC68 74153 full adder 7402, 7404, 7408, 7432, 7400 74106 sln 7404 LCC-64
Contextual Info: MB65XXXX MB66XXXX MB67XXXX AV CMOS SERIES GATE ARRAYS F U JIT S U June 1986 Edition 2.0 DESCRIPTION The Fujitsu MB65xxxx/M B66xxxx/M B67xxxx family are a series o f high perform ance CMOS gate arrays designed to provide high density, low pow er, and operating speeds th a t are com parable to standard bipolar logic. The A V M 865xxxx series is an ideal

BPW22A

Abstract: cm .02m z5u 1kv pin configuration of BFW10 la4347 B2X84 TDA3653 equivalent TRIAC TAG 9322 HEF40106BP equivalent fx4054 core dsq8
Contextual Info: Contents Page Page New product index Combined index and status codes viii x Mullard approved components BS9000, CECC, and D3007 lists CV list Integrated circuits Section index xliii 1 5 Standard functions LOGIC FAMILIES CMOS HE4000B family specifications CMOS HE4000B family survey

IC 74189 PIN DIAGRAM

Abstract: Ic 7485 comparator function table ic 74148 block diagram 74189 ttl memory 74189 MEMORY logic diagram ic 74148 Truth Table 74148 16 bit comparator using 74*85 IC IC 74189 DATA ALU IC 74181 FUNCTION TABLE
Contextual Info: RAYTHEON/ S E M IC O N D U C T O R H E D | 7ST73fc,G 0 0 0 1 ,7 0 0 Product Specifications Semicustom Digital Products RL7320Q R a y th e o n RL7320Q 3200 Gate HCMOS Evaluation Macrocell Array Features • 2n drawn gate-length HCMOS technology ■ Schottky/advanced Schottky speed

7483 4-bits parallel adder

Abstract: ttl 74147 ttl 7442 ttl 7483 enc8to3 priority encoder 16 to 4 74148 TTL 74138 TTL 74139 CNT4BUDA ENC10TO4
Contextual Info: VANTIS Soft Macro Reference Manual Basic Function Macros 1999 Vantis Application Center 1 TABLE OF CONTENTS Macro Name CNT4BUDA CNT4BUL CNT4DUDA CNT4DUL COMP4MAG COMP8EQ DEC2TO4 DEC3TO8 DEC4T10 DEC4T10N DEC4TO16 DFF8AR ENC10TO4 ENC8TO3 FADD1C FADD2C FADD4C

IC AND GATE 7408 specification sheet

Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
Contextual Info: PLS-EDIF Bidirectional EDIF Netlist Interface to MAX+PLUS Software Data Sheet September 1991, ver. 3 Features u J Provides a bidirectional netlist interface b etw ee n M A X + P L U S and other m ajor C A E softw are packages Sup ports the industry-standard Electronic Design Interchange Format

7408 CMOS

Abstract: TTL 7452 ttl 74183 LS 74141 7408, 7404, 7486, 7432 7404 7408 7432 TTL 74289 74106 CMOS 4017 series ttl 74395
Contextual Info: KG10000 SERIES SEMI-CUSTOM CMOS GATE ARRAY CMOS SILOCON GATE ARRAY Th e KG10000 S e rie s is c o n sists o f s ilico n gate C M O S arrays w hose inte rco n n e ctio n are in itia lly u n s p e c ifie d , th e re fo re custom LSI is p ro ce sse d w ith o n ly one m ask ste p a cu sto m ize d m etal m ask a c c o rd ­

ALU IC 74381

Abstract: encoder IC 74147 16CUDSLR 74139 truth table alu 74382 truth table for 7446 from ic 7447 truth table IC 74373 truth table pin diagram of ic 74190 truth table for ic 74138
Contextual Info: PLDS-HPS, PLS-HPS, PLS-OS & PLS-ES A N & * r a \ MAX+PLUS II Programmable Logic Development System & Software Data Sheet S eptem ber 1991, ver. 1 U M A X + P L U S II is the single, u nified d e velo p m e n t system for A lte ra 's C lassic, M A X 5000, M A X 7000, and S T G E P L D s .

ic 74180

Abstract: 74280 ic 74280 74180
Contextual Info: - I 44 - 74180 9-Bit Parity Generators/Checkers n ijiin in ir L in in if IN P U T S Z O F H 's A T A THRU H EVEN ODD EVEN ODD X X O U TPU TS Z X EVEN ODD L H L L L EVEN ODD H H H H H H L L L L tpd max DATA ZE/D 66 H H H 65 ns L tpd max' E l , 01 ZE/D 20 28

ALU IC 74181 circuit diagram

Abstract: sulzer s7 ram 74189 74189 ram 512x16Bit 74189 ram 16 ALU IC 74181 ALU IC 74181 FUNCTION TABLE Ic 7485 comparator function table 4-bit even parity using mux 8-1
Contextual Info: LC A 10 0 K C o m p acte d A r r a y Plus Eva lu a tio n D e vic e T ST LOGIC Preliminary Introduction The LCA100K HCMOS Evaluation Array contains a variety of common logic functions that allow a user to evaluate the performance of the LCA100K Com­ pacted Array Plus™ series from LSI Logic Corpora­

74139 demultiplexer

Abstract: 74169 SYNCHRONOUS 4-BIT BINARY COUNTER pin diagram 41 multiplexer 74153 3-8 decoder 74138 pin diagram bcd counter using j-k flip flop diagram pin diagram priority decoder 74148 CI 74151 74181 74175 clock 74165 block diagram 74151 demultiplexer
Contextual Info: M OIVIOUOUU, s em i c onductor GENERAL DESCRIPTION FEATURES The OKI MSM60300, MSM60700. and MSM61000 gate arrays are fabricated using state-of-the-art 3/i dual-layer metal silicon gate CMOS technology. A unit cell consists of 4 pairs o f transistors where each pair is made up of a PMOS and a NMOS transistor.

744040

Abstract: scx6206 74589 744020 Flip-Flop 7471 744017 744017 counter sn 74373 scx6218 74395
Contextual Info: July 1985 SCX m icroC M O S G ate A rray Fam ily A pplication G uide TABLE OF CONTENTS 1.0 General Description . 2 2.0 Product Features. 2 Enhanced Product Features. . 2

ic 74138

Abstract: IC 7402, 7404, 7408, 7432, 7400 ic 74139 IC 74147 IC 74373 74148 IC IC 74374 ic 7408, 7432, 7404, 7400, 7433, 7486, 74266 IC 74245 74189
Contextual Info: LEAPER-1 HANDY DIGITAL IC TESTER Supported Devices Features EMC Standards 1.Easy-operating Tester, particularly per 89/336/EEC be designed for the Digital IC 2.Supported Device : 74 / 40 / 45 / 41 / 44 Serial. 3.Small, portable, light and powersaving, usable with batteries.

Sony CXA1191M

Abstract: philips ecg master replacement guide FZK101 YD 803 SGS FZK 101 Siemens CMC 707 am radio receiver philips ecg semiconductors master replacement guide CXA1191M ym2612 ecg semiconductors master replacement guide
Contextual Info: Untitled HAM RADIO FILE - Various pinouts saved from the Chipdir 2010 http://www.chipdir.org/ 0512d -0512d +-\/-+ 1 -|5V in gnd in|- 24 2 -|5V in gnd in|- 23 3 -|5V in gnd in|- 22

AMD K6

Abstract: 74147 decimal to binary encoder
Contextual Info: a Preliminary Am3020/3030/3042/3064/3090 Advanced Micro Devices Am3000 Series Family of Programmable Gate Arrays DISTINCTIVE CHARACTERISTICS • Second generation user-programmable gate array ■ Flexible array architecture ■ High performance - 50 ,7 0 ,1 0 0 MHz commercial products

ALU IC 74181 circuit diagram

Abstract: TTL 74189
Contextual Info: ]>î| G5S7S5b DOEIOOB 1 ADV MICRO P LA /P LE/A RR AY S 7h 0 2 5 7 5 2 6 ADV MICRO PLA/PLE/ARRAYS 76C 21003 T-42-11-09 A m 7 2 2 a Q 2200 Gate HCMOS Evaluation Macrocell Array & ¡ it PRELIMINARY > 3 •Vj DISTINCTIVE CHARACTERISTICS Delay measurement block: