si4456
Abstract: 74194 Si4456DY 74194 datasheet 74194 data sheet data sheet 74194
Contextual Info: SPICE Device Model Si4456DY Vishay Siliconix N-Channel 40-V D-S MOSFET CHARACTERISTICS • N-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
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si4456dys-61150rev26-jun-06si4456+47419474194 datasheet74194 data sheetdata sheet 74194
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74194
Abstract: si4456 74194 data sheet Si4456DY
Contextual Info: SPICE Device Model Si4456DY Vishay Siliconix N-Channel 40-V D-S MOSFET CHARACTERISTICS • N-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
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si4456dy18-jul-0874194si4456+174194 data sheet
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full adder using ic 74138
Abstract: full adder using Multiplexer IC 74151 decoder IC 74138 TTL 74194 74151 multiplexer pin configuration of IC 74138 Application of Multiplexer IC 74151 IC 74138 74138 IC decoder Multiplexer IC 74151
Contextual Info: EP1800JC-EV1 EP1800JC-EV1 EVALUATION CHIP • Advanced CHMOS circuitry features low power, high performance, and high noise immunity power consumption, high noise margins, and ease of design. The EP1800 is implemented in a sub 2-micron dual-polysilicon CHMOS floating gate EPROM tech
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ep1800jc-ev1ept80068-pin0ut20+130ut21out220ut23full adder using ic 74138full adder using multiplexer ic 74151decoder ic 74138ttl 7419474151 multiplexerpin configuration of ic 74138application of multiplexer ic 74151ic 7413874138 ic decodermultiplexer ic 74151
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ic 74194
Abstract: pin diagram of ic 74195 ic 74194 pin configuration 74194 ic pin diagram Pin configuration of IC 74194 IC 74194 logic diagram IC 74195 ml741 74194 function table 74194 shift register
Contextual Info: Am54/74194*Am54/74195 Four-Bit Shift Registers gnmctive Characteristics • Parallel inputs and outputs i Positive edge-triggered clocking i Direct overriding clear • 100% reliability assurance testing in compliance with M IL-STD -883. LOGIC SYMBOLS f u n c t io n a l d e s c r i p t i o n
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am54/74194am54/74195mil-std-883ic 74194+9pin diagram of ic 74195ic 74194 pin configuration74194 ic pin diagrampin configuration of ic 74194ic 74194 logic diagramic 74195ml74174194 function table74194 shift register
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SN 4931
Abstract: NTC Thermistor smd 103-820-2 NTC 4,7 thermistor ntc smd 0805 thermistor ntc smd B57431V2104J062 ntc 2.5 ohm ntc 60 epcos NTC Thermistor 100 Ohm
Contextual Info: SMD NTC Thermistor SMD NTC Thermistor with Ni-Barrier Termination B57431V2104J062 Data sheet Applications - Temperature measurement and compensation for mobile phone applications e.g. battery pack, TCXO, LCD display , automotive and data systems Features
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b57431v2104j0622002/95/ec3000pcssn 4931+8ntc thermistor smd103-820-2ntc 4,7thermistor ntc smd 0805thermistor ntc smdntc 2.5 ohmntc 60 epcosntc thermistor 100 ohm
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74191, 74192, 74193 circuit diagram
Abstract: IC 7402, 7404, 7408, 7432, 7400 Truth Table 74161 counter schematic diagram 74161 7408, 7404, 7486, 7432 74244 uses and functions counter 74168 74191, 74192, 74193 truth table of ic 7495 A schematic diagram for the IC of 7411
Contextual Info: P L S -W S /H P MAX+PLUS II Programmable Logic Software for HP/Apollo Workstations Data Sheet September 1991, ver. 3 Features □ □ LI LI □ □ □ □ General Description Software support for Classic, M A X 5000, M A X 7000, and ST G E P L D s Runs on H ew lett Packard /A p o llo Series 3000, 3500, 4000, 4500, and
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hp400qic-2460-mbytetape74191, 74192, 74193 circuit diagram+9ic 7402, 7404, 7408, 7432, 7400truth table 74161counter schematic diagram 741617408, 7404, 7486, 743274244 uses and functionscounter 7416874191, 74192, 74193truth table of ic 7495 aschematic diagram for the ic of 7411
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truth table for ic 74138
Abstract: 16CUDSLR ALU IC 74183 IC 74151 diagram and truth table 74183 alu 74147 pin diagram and truth table pin diagram of IC 74184 HP-7475A 7408 ic truth table IC 74373 truth table
Contextual Info: PLCAD-SUPREME & PLS-SUPREME A+PLUS Programmable Logic Development System & Software Data Sheet September 1991, ver. 1 Features J J J J □ □ H igh-level su p p o rt for A ltera's general-purpose Classic EPLDs M ultiple design entry m ethods LogiCaps schem atic capture
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44-mbyte386-basedtruth table for ic 7413816cudslr+8alu ic 74183ic 74151 diagram and truth table74183 alu74147 pin diagram and truth tablepin diagram of ic 74184hp-7475a7408 ic truth tableic 74373 truth table
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74169 SYNCHRONOUS 4-BIT BINARY COUNTER
Abstract: 74139 demultiplexer 3-8 decoder 74138 pin diagram 3-8 decoder 74138 CI 74151 pin diagram 41 multiplexer 74153 JK Shift Register 74195 bcd counter using j-k flip flop diagram Multiplexer 74153 CI 74138
Contextual Info: AUGUST 1984 semiconductor MSM60300, MSM60700, MSM61000 CMOS GATE ARRAYS GENERAL DESCRIPTION FEATURES The OKI MSM60300, MSM60700, and MSM61000 gate arrays are fabricated using state-of-the-art 3/i dual-layer metal silicon gate CMOS technology. A unit cell consists of 4 pairs o f transistors
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msm60300msm60700msm6100074169 synchronous 4-bit binary counter+974139 demultiplexer3-8 decoder 74138 pin diagram3-8 decoder 74138ci 74151pin diagram 41 multiplexer 74153jk shift register 74195bcd counter using j-k flip flop diagrammultiplexer 74153ci 74138
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IC AND GATE 7408 specification sheet
Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
Contextual Info: PLS-EDIF Bidirectional EDIF Netlist Interface to MAX+PLUS Software Data Sheet September 1991, ver. 3 Features u J Provides a bidirectional netlist interface b etw ee n M A X + P L U S and other m ajor C A E softw are packages Sup ports the industry-standard Electronic Design Interchange Format
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ic and gate 7408 specification sheet74ls18374ls96sn 74168+67486 xor gateic 74ls192ic 7402, 7404, 7408, 7432, 7400ic 7486 for xor gateic 7418374ls193 function table
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74299 universal shift register
Abstract: 0x80808080 "shift register" alu
Contextual Info: PSoC Creator Component Data Sheet Shift Register ShiftReg 1.50 Features • Adjustable shift register size: 2 to 32 bits • Simultaneous shift in and shift out • Right shift or left shift • Reset input forces shift register to all 0s • Shift register value readable by CPU or DMA
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74xxx74299 universal shift register0x80808080shift register" alu |
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sn 74373
Abstract: SN 74114 logic diagram of ic 74112 IC 7486 xor IC 7402, 7404, 7408, 7432, 7400 7486 xor IC sn 74377 IC TTL 7486 xor IC TTL 7495 diagram and truth table IC 74374
Contextual Info: PLS-WS/SN MAX+PLUS II Programmable Logic Software for Sun Workstations Data Sheet September 1991, ver. 1 Features J J □ □ □ J □ IJ Softw are supp ort for Classic, M A X 5000, M A X 7000, and S T G EPLD s Runs on Sun S P A R C s ta tio n s with S u n O S version 4.1.1 or h igher
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sn 74373sn 74114logic diagram of ic 74112ic 7486 xor+6ic 7402, 7404, 7408, 7432, 74007486 xor icsn 74377ic ttl 7486 xoric ttl 7495 diagram and truth tableic 74374
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74299 universal shift register
Abstract: 74597 74XXX
Contextual Info: PSoC Creator Component Data Sheet Shift Register ShiftReg 1.60 Features • Adjustable shift register size: 2 to 32 bits • Simultaneous shift in and shift out • Right shift or left shift • Reset input forces shift register to all 0s • Shift register value readable by CPU or DMA
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74xxx74299 universal shift register74597 |
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ALU IC 74381
Abstract: encoder IC 74147 16CUDSLR 74139 truth table alu 74382 truth table for 7446 from ic 7447 truth table IC 74373 truth table pin diagram of ic 74190 truth table for ic 74138
Contextual Info: PLDS-HPS, PLS-HPS, PLS-OS & PLS-ES A N & * r a \ MAX+PLUS II Programmable Logic Development System & Software Data Sheet S eptem ber 1991, ver. 1 U M A X + P L U S II is the single, u nified d e velo p m e n t system for A lte ra 's C lassic, M A X 5000, M A X 7000, and S T G E P L D s .
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486-based12-ms44-mbytealu ic 74381+9encoder ic 7414716cudslr74139 truth tablealu 74382truth table for 7446 fromic 7447 truth tableic 74373 truth tablepin diagram of ic 74190truth table for ic 74138
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16CUDSLR
Abstract: 7474 D flip flop free alu 74382 counter schematic diagram 74161 sn 74373 pin diagram of ic 74190 ALU IC 74381 HFJV1 MUX 74151 IC 74373 truth table
Contextual Info: PLDS-MAX & PLS-MAX M MAX+PLUS Program mable Logic Developm ent System & Software M Data Sheet September 1991, ver. 1 □ □ □ □ □ □ □ □ □ S o ftw a re su p p o rt for M A X 5000 M u ltip le A rray M atriX E PL D s H ierarch ical d esig n entry m eth o d s for b oth g rap h ic and text d esig n s
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7400-series486-b16cudslr7474 d flip flop free+8alu 74382counter schematic diagram 74161sn 74373pin diagram of ic 74190alu ic 74381hfjv1mux 74151ic 74373 truth table
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IC 3-8 decoder 74138 pin diagram
Abstract: binary to gray code conversion using ic 74157 Multiplexer IC 74151 16 bit odd even parity checker using two IC 74180 binary to gray code conversion using ic 74139 7444 series Excess-3-gray code to Decimal decoder full adder using Multiplexer IC 74151 ic 74151 ic 74148 block diagram MSI IC 74138 decoder
Contextual Info: s I SEMICONDUCTOR GROUP 23E D • t?54E40 G00fl535 1 "T-q2-q \ p a rtII CMOS STANDARD CELL LSI MSM91H000 SERIES ¿U S' This M a terial C o p y r i g h t e d B y Its R e s p e c t i v e M a n u f a c t u r e r O K I SEMICONDUCTOR GROUP 23E D ■ b72M240 DGGÔ23b G
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msm91h000b72ms40dqq023bt-42-41+11b724240ic 3-8 decoder 74138 pin diagrambinary to gray code conversion using ic 74157multiplexer ic 7415116 bit odd even parity checker using two ic 74180binary to gray code conversion using ic 741397444 series excess-3-gray code to decimal decoderfull adder using multiplexer ic 74151ic 74151ic 74148 block diagrammsi ic 74138 decoder
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74LS82
Abstract: 74245 BIDIRECTIONAL BUFFER IC ic 4583 schmitt trigger core bit excess 3 adder using IC 7483 advantages for ic 7473 4 BIT COUNTER 74669 la 4508 ic schematic diagram XF107 74295 random number generator by using ic 4011 and 4017
Contextual Info: General Features The SCxD4 series of high performance CMOS gate arrays offers the user the ability to realise customised VLSI inte grated circuits featuring the speed performance previously obtainable only with bipolar technologies whilst retaining all the advantages of CMOS technology; low power consum p
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74ls8274245 bidirectional buffer icic 4583 schmitt triggercore bit excess 3 adder using ic 7483+6advantages for ic 74734 bit counter 74669la 4508 ic schematic diagramxf10774295random number generator by using ic 4011 and 4017
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asynchronous 4bit up down counter using jk flip flop
Abstract: counter 74168 Multiplexer 74152 3-8 decoder 74138 synchronous counter using 4 flip flip 74183 alu 7444 series Excess-3-gray code to Decimal decoder MH 74151 counter 74169 74169 SYNCHRONOUS 4-BIT BINARY COUNTER
Contextual Info: • GENERAL DESCRIPTION T h e M S M 7 0 V 0 0 0 series is the gate array LSI based on the m aster slice m e th o d using the high p erfo rm an ce silicon gate 1.5 m ic ro n H C M O S process w ith th e d u a l-la y e r m etal structure. T his series has th e features to easily realize fu n c tio n s o f th e s c h m itt trigger, c ry s ta l/
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msm70v000asynchronous 4bit up down counter using jk flip flopcounter 74168multiplexer 74152+73-8 decoder 74138synchronous counter using 4 flip flip74183 alu7444 series excess-3-gray code to decimal decodermh 74151counter 7416974169 synchronous 4-bit binary counter
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744040
Abstract: 744017 Scx6206 sn 74373 latch 74574 744020 Flip-Flop 7471 74292 74299 universal shift register SCX6218
Contextual Info: July 1985 Jim Semiconductor SCX microCMOS Gate Array Family Application Guide TABLE OF CONTENTS General Description . 2 2.0 Product F eatures. 2.0.1 Enhanced Product Features.
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aa32096744040744017scx6206+7sn 74373latch 74574744020flip-flop 74717429274299 universal shift registerscx6218
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744040
Abstract: scx6206 74589 744020 Flip-Flop 7471 744017 744017 counter sn 74373 scx6218 74395
Contextual Info: July 1985 SCX m icroC M O S G ate A rray Fam ily A pplication G uide TABLE OF CONTENTS 1.0 General Description . 2 2.0 Product Features. 2 Enhanced Product Features. . 2
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aa32096744040scx620674589+7744020flip-flop 7471744017744017 countersn 74373scx621874395
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AMD K6
Abstract: 74147 decimal to binary encoder
Contextual Info: a Preliminary Am3020/3030/3042/3064/3090 Advanced Micro Devices Am3000 Series Family of Programmable Gate Arrays DISTINCTIVE CHARACTERISTICS • Second generation user-programmable gate array ■ Flexible array architecture ■ High performance - 50 ,7 0 ,1 0 0 MHz commercial products
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am3020/3030/3042/3064/3090am3000amd k674147 decimal to binary encoder |
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74194 ring counter
Abstract: grid tie inverter schematic diagram 74299 universal shift register CI 74241 DN 74352 grid tie inverter schematics 7483 parallel adder pin diagram multiplexor 74153 multiplexor 74151 grid tie inverters circuit diagrams
Contextual Info: H Preliminary Am3020/3030/3042/3064/3090 Advanced Micro Devices Am3000 Series Family of Programmable Gate Arrays DISTINCTIVE CHARACTERISTICS • Second generation user-programmable gate array ■ Flexible array architecture ■ High performance - 50, 70,100 MHz commercial products
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am3020/3030/3042/3064/3090am300074194 ring countergrid tie inverter schematic diagram+874299 universal shift registerci 74241dn 74352grid tie inverter schematics7483 parallel adder pin diagrammultiplexor 74153multiplexor 74151grid tie inverters circuit diagrams
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74ls82
Abstract: 74245 BIDIRECTIONAL BUFFER IC 74ls150 ph 4531 diode 4583 dual schmitt trigger ic D flip flop 7474 74245 BUFFER IC ic 7483 BCD adder data sheet ic 74139 Quad 2 input nand gate cd 4093
Contextual Info: General Features The SCxD4 series of high perform ance CM O S gate arrays offers the user the ability to realise custom ised VLSI inte grated circuits featuring the speed perform ance previously obtainable only with bipo lar tech nolog ies whilst retaining all
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74ls8274245 bidirectional buffer ic74ls150ph 4531 diode+64583 dual schmitt triggeric d flip flop 747474245 buffer icic 7483 bcd adderdata sheet ic 74139quad 2 input nand gate cd 4093
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priority encoder 74148
Abstract: priority encoder 74147 shift register 7495 msm7200 MSM7000 alu 74381 msm7500 MSM72000 74150 demultiplexer multiplexers 74 LS 150
Contextual Info: • G EN ER A L DESCRIPTION T h e M S M 7 0 0 0 0 series is the gate array L S I based on the master siice m ethod using the high perform ance silicon gate H C M O S process w ith the dual-layer metal structure. T h is series has the features to easily realize fu n c tio n s-o f the sch m itt trigger, crystal/
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msm70000msm71000msm72000msm74000+10msm75000priority encoder 74148priority encoder 74147shift register 7495msm7200msm7000alu 74381msm750074150 demultiplexermultiplexers 74 ls 150
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SN7401
Abstract: sn29601 SN7449 SN74298 SN74265 MC3021 SN54367 sn74142 signetics 8223 9370c
Contextual Info: INDEX PAGE TTL Integrated Circuits Mechanical Data 1 TTL Interchangeability Guide 6 Functional Selection Guide 19 Explanation of Function Tables 38 54/74 Families of Compatible TTL Circuits 40 TTL INTEGRATED CIRCUITS MECHANICAL DATA J ceramic dual-in-line package
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24-leadsn74s474sn54s475sn74s475+16sn54s482sn74s482lcc4270sn54490sn74490sn54ls490sn7401sn29601sn7449sn74298sn74265mc3021sn54367sn74142signetics 82239370c
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