74573
Abstract: 74574 7486 XOR GATE 7486 full adder latch 74574 7408, 7404, 7486, 7432 7490 Decade Counter 74373 cmos dual s-r latch 2 bit magnitude comparator using 2 xor gates design a BCD counter using j-k flipflop
Contextual Info: Semiconductor Logic Device Cross-Reference Here is a comprehensive cross-reference of TTL and CMOS chips that are readily available over the counter from such places as Maplin Electronics in the UK . Tables of both TTL and CMOS devices are provided along with tables grouping chips with the same functionality together.
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74573745747486 xor gate7486 full adder+6latch 745747408, 7404, 7486, 74327490 decade counter74373 cmos dual s-r latch2 bit magnitude comparator using 2 xor gatesdesign a bcd counter using j-k flipflop
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counter schematic diagram using 74193
Abstract: shift register ttl ttl 74194 logic diagram 74194 counter 74193 shift register circuit diagram of 16 bit counter 74194 shift register AT6005 counter schematic diagram 74194 function table
Contextual Info: FPGA 16 Bit Up/Down Counter/Shift Register Introduction The AT6000 Series field programmable gate array FPGA lets the designer implement a synchronous, 16 bit Up/Down Counter/Shift Register that operates at 22 MHz under the worst commercial operating conditions. In
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at6000at6005counter schematic diagram using 74193shift register ttl+7ttl 74194 logic diagram74194 counter74193 shift registercircuit diagram of 16 bit counter74194 shift registercounter schematic diagram74194 function table
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74194 counter
Abstract: 74194 shift register counter schematic diagram using 74193 shifter using mux circuit diagram of 16 bit counter 74194 74194 datasheet ttl 74193 74193 counter data sheet 74193 application diagrams
Contextual Info: FPGA 16-Bit Up/Down Counter/Shift Register Introduction The AT6000 Series field programmable gate array FPGA lets the designer implement a synchronous, 16-bit Up/Down Counter/Shift Register that operates at 22 MHz under the worst commercial operating conditions. In this circuit is most of the
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16-bitat6000at600574194 counter+974194 shift registercounter schematic diagram using 74193shifter using muxcircuit diagram of 16 bit counter7419474194 datasheetttl 7419374193 counter data sheet74193 application diagrams
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74194 shift register
Abstract: 74194 74193 shift register ttl 74194 logic diagram 74193 74194 function table half-adder by using D flip-flop 74193 counter data sheet Asynchronous up and down counter 74194 datasheet
Contextual Info: 16-bit Up/Down Counter/Shift Register Introduction Description The AT6000 Series field programmable gate array FPGA lets the designer implement a synchronous, 16-bit Up/Down Counter/Shift Register that operates at 22 MHz under the worst commercial operating conditions. In this
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16-bitat6000at60050465c+1109/99/xm74194 shift register7419474193 shift registerttl 74194 logic diagram7419374194 function tablehalf-adder by using d flip-flop74193 counter data sheetasynchronous up and down counter74194 datasheet
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7483 4 bit binary full adder
Abstract: 74151 demultiplexer 74153 full adder 74198 shift register 7483 4 bit binary adder 7483 8 bit binary adder 74155 demultiplexer 74150 multiplexer bcd adder with 74283 4 bit 7483 binary adder
Contextual Info: Digital Circuits 54/74 MSI Series Type Description Prop Delay ns or Max. Op. Freq. (MHz) Available Packages P w r1 Diss (mW) 14 Pin DC CJ 16 Pin CL 54/7442 BCD-to-Decimal Decoder 22 140 X 54/7443 Excess 3-to-Decimal Decoder 22 X X 54/7444 Excess 3 Gray-to-Decimal Decoder
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16-to-1types--557483 4 bit binary full adder74151 demultiplexer+874153 full adder74198 shift register7483 4 bit binary adder7483 8 bit binary adder74155 demultiplexer74150 multiplexerbcd adder with 742834 bit 7483 binary adder
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FZH115B
Abstract: fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104
Contextual Info: Digital I.C.s, 74INTEGRATED CIRCUITS DIGITAL TTL, 74LS & 74HC Series Quad 2-input NAND gate Quad 2-input NAND gate, open collector Quad 2-input NOR gate Quad 2-input NOR gate, open collector Hex inverter Hex inverter, O/C collector Hex inverter, Buffer 30V O/P
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74integratedline-to-10150ns16-dil+1318-pin250ns300nsfzh115bfzh261fzk105fzh131fzj111fzh115fzh205multiplexer ic 74151fzh265b74ls104
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400EM
Abstract: 472EM cdb 400E CI 74151 CDB404E 4153E 7404 7408 7432 4121EM IC TTL 7460 446E
Contextual Info: JBIGITAl_ _ INTEGRATED IK* m m X.X.L. . L 5400 5402 5403 5404 5405 5406 5407 5408 5409 5410 5413 5416 5417 5420 5430 5432 5437 5438 5440 5442 5446 5447 5450 5451 5453 X . X ROWER 74LS00 74LS02 74LS03 74LS04 74LS05 74LS08 74LS09 74'^SIO 74LS11 •74LS12 74LS13
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74ls0074ls0274ls0374ls04+1674ls0574ls0874ls0974ls1174ls1274ls13400em472emcdb 400eci 74151cdb404e4153e7404 7408 74324121emic ttl 7460446e
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74169 SYNCHRONOUS 4-BIT BINARY COUNTER
Abstract: 74139 demultiplexer 3-8 decoder 74138 pin diagram 3-8 decoder 74138 CI 74151 pin diagram 41 multiplexer 74153 JK Shift Register 74195 bcd counter using j-k flip flop diagram Multiplexer 74153 CI 74138
Contextual Info: AUGUST 1984 semiconductor MSM60300, MSM60700, MSM61000 CMOS GATE ARRAYS GENERAL DESCRIPTION FEATURES The OKI MSM60300, MSM60700, and MSM61000 gate arrays are fabricated using state-of-the-art 3/i dual-layer metal silicon gate CMOS technology. A unit cell consists of 4 pairs o f transistors
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msm60300msm60700msm6100074169 synchronous 4-bit binary counter+974139 demultiplexer3-8 decoder 74138 pin diagram3-8 decoder 74138ci 74151pin diagram 41 multiplexer 74153jk shift register 74195bcd counter using j-k flip flop diagrammultiplexer 74153ci 74138
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7486 XOR gate
Abstract: 8mcomp XOR 7486 Truth Table 74192 4count XOR 7486 GATE 16cudslr 7472 truth table 7486 xor 74194 truth table
Contextual Info: PROGRAMMABL E a \ l o g ic s o f t w a r e I-WV i1 I— rT -U U PLS-MAX =Er - ]T — n V n i n ni l A V P L S -m A X MAX+PLUS FEATURES GENERAL DESCRIPTION • Unified Development system for the entire Multiple Array Matrix MAX family of EPLDs. • Multiple design entry methods including a hier
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7486 xor gate8mcompxor 7486truth table 74192+64countxor 7486 gate16cudslr7472 truth table7486 xor74194 truth table
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74LS324
Abstract: 7400 TTL 74LS327 7402, 7404, 7408, 7432, 7400 80C96 74251 multiplexer 74C923 equivalent Flip-Flop 7473 74LS324 equivalent 74C08 equivalent
Contextual Info: N T E ELECTRONICS INC 17E H ^3125=1 G0G513S Q B - o S V. ! - TRANSISTOR-TRANSISTOR LOGIC INCLUDES SERIES 74C CMOS NTE TYPE NO. •DESCRIPTION . 7214 7400 74C00 74H00 74LS00 74S00 3-State Sel/Mlpx Quad 2-Input Pos Quad 2-Input Pos Quad 2-Input Pos Quad 2-Input Pos
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g0g513s74c0074h0074ls00+1674s0074h0174ls0174c0274ls0274s0274ls3247400 ttl74ls3277402, 7404, 7408, 7432, 740080c9674251 multiplexer74c923 equivalentflip-flop 747374ls324 equivalent74c08 equivalent
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IC 3-8 decoder 74138 pin diagram
Abstract: binary to gray code conversion using ic 74157 Multiplexer IC 74151 16 bit odd even parity checker using two IC 74180 binary to gray code conversion using ic 74139 7444 series Excess-3-gray code to Decimal decoder full adder using Multiplexer IC 74151 ic 74151 ic 74148 block diagram MSI IC 74138 decoder
Contextual Info: s I SEMICONDUCTOR GROUP 23E D • t?54E40 G00fl535 1 "T-q2-q \ p a rtII CMOS STANDARD CELL LSI MSM91H000 SERIES ¿U S' This M a terial C o p y r i g h t e d B y Its R e s p e c t i v e M a n u f a c t u r e r O K I SEMICONDUCTOR GROUP 23E D ■ b72M240 DGGÔ23b G
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msm91h000b72ms40dqq023bt-42-41+11b724240ic 3-8 decoder 74138 pin diagrambinary to gray code conversion using ic 74157multiplexer ic 7415116 bit odd even parity checker using two ic 74180binary to gray code conversion using ic 741397444 series excess-3-gray code to decimal decoderfull adder using multiplexer ic 74151ic 74151ic 74148 block diagrammsi ic 74138 decoder
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74LS82
Abstract: 74245 BIDIRECTIONAL BUFFER IC ic 4583 schmitt trigger core bit excess 3 adder using IC 7483 advantages for ic 7473 4 BIT COUNTER 74669 la 4508 ic schematic diagram XF107 74295 random number generator by using ic 4011 and 4017
Contextual Info: General Features The SCxD4 series of high performance CMOS gate arrays offers the user the ability to realise customised VLSI inte grated circuits featuring the speed performance previously obtainable only with bipolar technologies whilst retaining all the advantages of CMOS technology; low power consum p
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74ls8274245 bidirectional buffer icic 4583 schmitt triggercore bit excess 3 adder using ic 7483+6advantages for ic 74734 bit counter 74669la 4508 ic schematic diagramxf10774295random number generator by using ic 4011 and 4017
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lm294oct
Abstract: d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C
Contextual Info: Integrated Circuits 74LS Series Featuring better performance than standard 7400 series devices, the 74LS series also uses about 1/5th the power. Part# Pins Description 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 74LS10 74LS11 74LS12
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74ls0074ls0174ls0274ls03+1674ls0474ls0574ls0674ls0774ls0874ls09lm294octd71054cd71055clm294oct-1274c9287486 xor gateinterfacing adc 0808 with 8086 microprocessor555 7490 7447 7 segment led displaymotorola 74ls76nec d71055c
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up down counter using IC 7476
Abstract: full adder using Multiplexer IC 74151 74154 shift register IC sk 7443 full adder circuit using ic 74153 multiplexer DN 74352 full adder using ic 74138 74183 adder pin function of ic 74390 7478 J-K Flip-Flop
Contextual Info: FUJITSU MICROELECTRONICS FUJITSU 37417bH 0010SÔ3 23E D MB65XXXX MB66XXXX MB67XXXX AV CMOS SERÍES GATE ARRAYS ~ June 1986 Edition 2.0 : T - 4 2 - n - o °i DESCRIPTION S The Fujitsu MB65xxxx/MB66xxxx/MB67xxxx family are a series of high performance CMOS gate arrays designed to provide high
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37417bh0010smb65xxxxmb66xxxx+14mb67xxxxmb65xxxx/mb66xxxx/mb67xxxx350avbs40avbup down counter using ic 7476full adder using multiplexer ic 7415174154 shift register icsk 7443full adder circuit using ic 74153 multiplexerdn 74352full adder using ic 7413874183 adderpin function of ic 743907478 j-k flip-flop
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744040
Abstract: scx6206 74589 744020 Flip-Flop 7471 744017 744017 counter sn 74373 scx6218 74395
Contextual Info: July 1985 SCX m icroC M O S G ate A rray Fam ily A pplication G uide TABLE OF CONTENTS 1.0 General Description . 2 2.0 Product Features. 2 Enhanced Product Features. . 2
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aa32096744040scx620674589+7744020flip-flop 7471744017744017 countersn 74373scx621874395
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74ls82
Abstract: 74245 BIDIRECTIONAL BUFFER IC 74ls150 ph 4531 diode 4583 dual schmitt trigger ic D flip flop 7474 74245 BUFFER IC ic 7483 BCD adder data sheet ic 74139 Quad 2 input nand gate cd 4093
Contextual Info: General Features The SCxD4 series of high perform ance CM O S gate arrays offers the user the ability to realise custom ised VLSI inte grated circuits featuring the speed perform ance previously obtainable only with bipo lar tech nolog ies whilst retaining all
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74ls8274245 bidirectional buffer ic74ls150ph 4531 diode+64583 dual schmitt triggeric d flip flop 747474245 buffer icic 7483 bcd adderdata sheet ic 74139quad 2 input nand gate cd 4093
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7408, 7404, 7486, 7432 use NAND gate
Abstract: JLCC-68 ci 74386 cI 74150 jLCC68 74153 full adder 7402, 7404, 7408, 7432, 7400 74106 sln 7404 LCC-64
Contextual Info: MB65XXXX MB66XXXX MB67XXXX AV CMOS SERIES GATE ARRAYS F U JIT S U June 1986 Edition 2.0 DESCRIPTION The Fujitsu MB65xxxx/M B66xxxx/M B67xxxx family are a series o f high perform ance CMOS gate arrays designed to provide high density, low pow er, and operating speeds th a t are com parable to standard bipolar logic. The A V M 865xxxx series is an ideal
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mb65xxxxmb66xxxxmb67xxxxmb65xxxx/mb66xxxx/mb67xxxx+14m865xxxx350avb540avb850avb7408, 7404, 7486, 7432 use nand gatejlcc-68ci 74386ci 74150jlcc6874153 full adder7402, 7404, 7408, 7432, 740074106sln 7404lcc-64
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IC 3-8 decoder 74138 pin diagram
Abstract: full adder using ic 74138 full adder using Multiplexer IC 74151 pin diagram for IC 7483 for 4 bit adder chip and pin diagram of IC 7491 DN 74352 circuit diagram for IC 7483 full adder application of ic 74153 ic 74148 block diagram 74191, 74192, 74193 circuit diagram
Contextual Info: MB65XXXX MB66XXXX MB67XXXX AV CMOS SERIES GATE ARRAYS F U JIT S U June 1986 Edition 1.0 DESCRIPTION The Fujitsu MB65xxxx/MB66xxxx/MB67xxxx family are a series of high performance CMOS gate arrays designed to provide high density, low power, and operating speeds that are comparable to standard bipolar logic. The AV MB65xxxx series is an ideal
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mb65xxxxmb66xxxxmb67xxxxmb65xxxx/mb66xxxx/mb67xxxx+10ic 3-8 decoder 74138 pin diagramfull adder using ic 74138full adder using multiplexer ic 74151pin diagram for ic 7483 for 4 bit adder chipand pin diagram of ic 7491dn 74352circuit diagram for ic 7483 full adderapplication of ic 74153ic 74148 block diagram74191, 74192, 74193 circuit diagram
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function of latch ic 74373
Abstract: full adder using ic 74138 pins and their function in ic 74163 encoder IC 74147 74373 cmos dual s-r latch sn 74373 74373 latch ic 74541 buffer MSM7000 MSM70000
Contextual Info: • GENERAL DESCRIPTION The M S M 7 0 0 0 0 series is the gate array L S I based on the master slice method using the high performance silicon gate H C M O S process with the dual-layer metal structure. This series has the features to easily realize functions-of the schm itt trigger, crystal/
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msm70000msiw71000msm74000function of latch ic 74373+8full adder using ic 74138pins and their function in ic 74163encoder ic 7414774373 cmos dual s-r latchsn 7437374373 latch ic74541 buffermsm7000
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ALU IC 74381
Abstract: encoder IC 74147 16CUDSLR 74139 truth table alu 74382 truth table for 7446 from ic 7447 truth table IC 74373 truth table pin diagram of ic 74190 truth table for ic 74138
Contextual Info: PLDS-HPS, PLS-HPS, PLS-OS & PLS-ES A N & * r a \ MAX+PLUS II Programmable Logic Development System & Software Data Sheet S eptem ber 1991, ver. 1 U M A X + P L U S II is the single, u nified d e velo p m e n t system for A lte ra 's C lassic, M A X 5000, M A X 7000, and S T G E P L D s .
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486-based12-ms44-mbytealu ic 74381+9encoder ic 7414716cudslr74139 truth tablealu 74382truth table for 7446 fromic 7447 truth tableic 74373 truth tablepin diagram of ic 74190truth table for ic 74138
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7408, 7404, 7486, 7432
Abstract: RF400U functional diagram of 7400 and cd 4011 ls 7404 180 nm CMOS standard cell library TEXAS INSTRUMENTS 74191 4BITS s273 buffer 74374 7408 CMOS cmos 7404
Contextual Info: TGC100 Series CMOS Gate Arrays RELEASE 3.0, REVISED JANUARY 1990 • Twelve Arrays with up to 26K Available Gates • Fast Prototype Turnaround Time • Extensive Design Support - Design Libraries Compatible with Daisy, Valid, and Mentor CAE Systems - Tl Regional ASIC Design Centers
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tgc10020-masink/12matdb10lj+14120ljtdc11ljtdn11lj100mhz7408, 7404, 7486, 7432rf400ufunctional diagram of 7400 and cd 4011ls 7404180 nm cmos standard cell library texas instruments74191 4bitss273buffer 743747408 cmoscmos 7404
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FZK101
Abstract: FZK105 upd101 SNF10 SN76131 TAA700 FZH111 FZJ101 MFC8010 MFC8001
Contextual Info: HANDBOOK OF INTESBATEI CIRCUITS in EQUIVALENTS AND SUBSTITUTES A lthough every care is taken with the preparation of this book, the publishers will not be responsible for any errors that might occur. I.S.B.N. 0 900162 35 X 1974 by Bernard B. Babani First Published 1974
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grou19cn127-128-638zn220-320cn131-132-642+16zn221-321cn133-134-644zn248-348cn135-136-646zn222-322cn121-122-682fzk101fzk105upd101snf10sn76131taa700fzh111fzj101mfc8010mfc8001
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16CUDSLR
Abstract: 7474 D flip flop free alu 74382 counter schematic diagram 74161 sn 74373 pin diagram of ic 74190 ALU IC 74381 HFJV1 MUX 74151 IC 74373 truth table
Contextual Info: PLDS-MAX & PLS-MAX M MAX+PLUS Program mable Logic Developm ent System & Software M Data Sheet September 1991, ver. 1 □ □ □ □ □ □ □ □ □ S o ftw a re su p p o rt for M A X 5000 M u ltip le A rray M atriX E PL D s H ierarch ical d esig n entry m eth o d s for b oth g rap h ic and text d esig n s
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7400-series486-b16cudslr7474 d flip flop free+8alu 74382counter schematic diagram 74161sn 74373pin diagram of ic 74190alu ic 74381hfjv1mux 74151ic 74373 truth table
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asynchronous 4bit up down counter using jk flip flop
Abstract: counter 74168 Multiplexer 74152 3-8 decoder 74138 synchronous counter using 4 flip flip 74183 alu 7444 series Excess-3-gray code to Decimal decoder MH 74151 counter 74169 74169 SYNCHRONOUS 4-BIT BINARY COUNTER
Contextual Info: • GENERAL DESCRIPTION T h e M S M 7 0 V 0 0 0 series is the gate array LSI based on the m aster slice m e th o d using the high p erfo rm an ce silicon gate 1.5 m ic ro n H C M O S process w ith th e d u a l-la y e r m etal structure. T his series has th e features to easily realize fu n c tio n s o f th e s c h m itt trigger, c ry s ta l/
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msm70v000asynchronous 4bit up down counter using jk flip flopcounter 74168multiplexer 74152+73-8 decoder 74138synchronous counter using 4 flip flip74183 alu7444 series excess-3-gray code to decimal decodermh 74151counter 7416974169 synchronous 4-bit binary counter
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