7402 QUAD 2 INPUT NOT Search Results

7402 quad 2- input nor gate

Abstract: 7402 quad 2 input not 7402 TTL 7402 logic diagram 7402 NOR gate 7402 ttl gate 9N02 9N02 7402 TTL 7402 9N02/7402
Contextual Info: FAIRCHILD TT L/SSI • 9N02/5402, 7402 QUAD 2-INPUT NOR GATE SCHEMATIC DIAGRAM EACH GATE LOGIC AND CONNECTION DIAGRAM DIP (TOP VIEW) FLATPAK (TOP VIEW) T5TS1 ra r?l Positive logic: Y = A+B C o m p o n e n t values show n are ty p ic a l. RECOMMENDED OPERATING CONDITIONS

TTL LS 7407

Abstract: CI 7407 CI 7402 TTL LS 7402 ls 7408 TTL 74s02 CI 74LS02 74LS27 TTL 7425 TTL 74ls02
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D7 54/7430, 54H/74H30 54S/74S30, 54LS/74LS30 Vcc NC r r r NC r D8 54S/74S133, 54LS/74LS133 D9 54S/74S134 Vcc NC r fi fi Ili ill HI Li Lil lil GND LzJ R R R R F IR R F I E RRRRRRRFl li lli lli lli J lill ill ill iJGND

7402 pin configuration

Abstract: TTL 7402 7402 TTL specification of 74ls02 7402 nor 7402 signetics 7402 NOR gate 74LS02 pin configuration 7402 7402 quad 2 input not
Contextual Info: 7402, LS02, S02 Signetics Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V +5 % ; T a = 0°C to + 7 0 “C

7402 TTL

Abstract: 7402 TTL 7402 7402 pin configuration 74LS02 function table 74LS02 pin configuration 7402 signetics TTL specification of 74ls02 7402 nor 74S02
Contextual Info: Signetics I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPE TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE VCc = 5V ±5% ; T a = 0°C to +70°C

IC 7402, 7404, 7408, 7432, 7400

Abstract: TTL IC 7405 7400 logic gate ic IC AND GATE 7408 ic 7400 logic symbol 7408 AND GATE fan in 9N01 IC 7400 nand gate 7408, 7404, 7486, 7432 IC 7404 hex inverter
Contextual Info: SSI • GATES, BUFFERS AND INVERTERS LOW POWER tpcj = 20 ns Pd = 2 mW per Gate STANDARD tpd = 10 ns Pd = 10 mW per Gate 0°C to +70° C and -5 5 ° to +125°C 0° to +70° C -5 5 ° t o +125° C 9 L00 9N00/7400 9N00/5400 9N01/7401 9N01/5401 9N03/7403 9N03/5403

7402 NOR gate ic pin configuration

Abstract: IC 7402 IC PIN CONFIGURATION OF 74LS02 7402 pin configuration 74LS02 pin configuration 74LS02 function table 7402 ic ttl 7402 7402 logic gate ic IC 74LS02
Contextual Info: Signetics I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE VCC = 5V±5%; Ta = 0°C to +70°C

74S02N

Abstract: 7402 NOR gate ic pin configuration IC 7402 74LS02N LS 7402 IC PIN CONFIGURATION OF 74LS02 7402 pin configuration 74ls02 signetics 7402 quad 2 input not 74LS02 pin configuration
Contextual Info: Signetìcs I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY TYPE 7402 10ns 11m A 74LS 02 10ns 2.2m A 74S 02 3.5ns 22m A ORDERING CODE COMMERCIAL RANGE VCc = 5V ±5% ; T a = 0°C to +70°C

CI 7408

Abstract: 74LS series logic gates CI 7402 TTL 7408 7408 and 7408 TTL CI 74LS08 TTL 7486 7408 CI 74LS86
Contextual Info: FAIRCHILD DIGITAL TTL Quad 2-Input 9015 3 Triple 3-Input — 4 Dual 4-Input w/Strobe — 5 Dual 4-Input Exp — 6 Dual 5-Input — Logic/Connection Diagram12* 2 High Speed Schottky 54S/74S 3 ns/19 mW — 3 LL High Speed 54H/74H 6 ns/22 mW Quad 2-Input E

7411 pin diagram

Abstract: TTL 7408 DS 7409 74LS574 CI 7408 7407 connection diagram 74LS386 TTL 7408 DIAGRAMS 74LS08 PIN CI 74LS08
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D93 54LS/74LS379 D94 9386, 74LS266, 54LS/74LS386 D95 54LS/74LS398 r ei fi r E5i r?i n Vcc 1 4 5 12 13 4 5 7 6 14 15 17 16 lOa Ila lo b lib lo c lie lo d lid S CP Qa Qb 2 GND Vcc = Pin 20 GND = Pin 10 Vcc = Pin 16

CI 7408

Abstract: CI 74LS08 TTL 74ls21 74LS21 7407 connection diagram 54LS CI 7413 7432 TTL fairchild 74LS125 7408 and
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L - T T L D65 54/7413, 54LS/74LS13 Vcc NC R R R fü| FÖI f71 r«l D66 54/74125, 54LS/74LS125 D67 54/74126, 54LS/74LS126 Vcc Vcc äJ QND E D68 54LS/74LS365 j y E D O 3X 5 rn m D O E D D O E D O IPTJ? ~ ? f i r

CI 74LS08

Abstract: 7432 TTL fairchild TTL 7421 74LS21 ttl 7432 TTL 74ls32 TTL 7409 TTL 7486 TTL 74ls86 TTL 7432 fairchild
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L-T T L D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi

Z427

Abstract: FL 9014 TTL 7409 TTL 7486 74LS32 74ls86 TTL 74s32 74LS08 74LS11 74LS02
Contextual Info: FAIRCHILD DIGITAL TTL SSI FUNCTIONS Cont’d X to x n agic/Conne Diagram igh Speed 54H/74H ns/22 mW O IO U) —1 ligh Speed Schottky 54S/74S ns/19 mW CO Std. TTL 54/74 1 ns/10 mW E a> Dw Power Schottky ILS/74LS ns/2 mW ~'c o u c 3 U. 9000 Series ns/10 mW

logic diagram of 7432

Abstract: CI 7408 TTL 7486 7408 s.i 7408 FL 9014 7486 nor CI 74LS08 7408 fairchild 7432 TTL
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi Fai np f i ! Föi lyi rn

FZH115B

Abstract: fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104
Contextual Info: Digital I.C.s, 74INTEGRATED CIRCUITS DIGITAL TTL, 74LS & 74HC Series Quad 2-input NAND gate Quad 2-input NAND gate, open collector Quad 2-input NOR gate Quad 2-input NOR gate, open collector Hex inverter Hex inverter, O/C collector Hex inverter, Buffer 30V O/P

Contextual Info: TCED1100 G up to TCED4100 Vishay Telefunken T Optocoupler with Photodarlington Output Description The TCED1100/ TCED2100/ TCED4100 consists of a phototransistor optically coupled to a gallium arse­ nide infrared-emitting diode in a 4-lead up to 16-lead plastic dual inline package.

Contextual Info: TCED1100 G up to TCED4100 Vishay Telefunken Optocoupler with Photodarlington Output Description The TCED1100/ TCED2100/ TCED4100 consists of a phototransistor optically coupled to a gallium arse­ nide infrared-emitting diode in a 4-lead up to 16-lead plastic dual inline package.

pin diagram of IC 7402

Abstract: IC 7402 pin diagram 4 pin optocoupler CI 7402 TCED4100 IC 7402 TCED1100 TCED1100G TCED2100 ED1100
Contextual Info: TCED1100 G up to TCED4100 Vishay Telefunken Optocoupler with Photodarlington Output Description The TCED1100/ TCED2100/ TCED4100 consists of a phototransistor optically coupled to a gallium arsenide infrared-emitting diode in a 4-lead up to 16-lead plastic dual inline package.

et1600

Contextual Info: TCET1600 up to TCET4600 Vishay Telefunken Optocoupler with Phototransistor Output Description The TCET1600/ TCET2600/ TCET4600 consists of a phototransistor optically coupled to 2 gallium arse­ nide i nf rared-emitti ng diodes i n a 4-lead up to 16-lead plastic dual inline package.

OPTOCOUPLER MARKING CODE 815

Contextual Info: TCET1600 up to TCET4600 VISHAY Vishay Telefunken T Optocoupler with Phototransistor Output Description The TCET1600/ TCET2600/ TCET4600 consists of a phototransistor optically coupled to 2 gallium arse­ nide inf rared-emitting diodes in a 4-lead up to 16-lead

et1600

Abstract: 4 pin optocoupler 7402 datasheet 7402 IC 7402 pin diagram of IC 7402 TCET1600 TCET2600 TCET4600
Contextual Info: TCET1600 up to TCET4600 Vishay Telefunken Optocoupler with Phototransistor Output Description The TCET1600/ TCET2600/ TCET4600 consists of a phototransistor optically coupled to 2 gallium arsenide infrared-emitting diodes in a 4-lead up to 16-lead plastic dual inline package.

application notes on ARINC-429 receiver

Abstract: dd-03282
Contextual Info: DD-00429 ARINC 429 MICROPROCESSOR INTERFACE FEATURES DESCRIPTION DDC's DD-00429 provides a complete and flexible interface between a microprocessor and an ARINC 429 data bus. The DD-00429 interfaces to a processor through a 128 x 32 bit static RAM as well as four 32 x 32

TCET110G

Abstract: TCET4100
Contextual Info: TCET110. G up to TCET4100 VISHAY Vishay Telefunken ▼ Optocoupler with Phototransistor Output Description The TCET110./ TCET2100/ TCET4100 consists of a phototransistor optically coupled to a gallium arse­ nide infrared-emitting diode in a 4-lead up to 16-lead

application notes on ARINC-429 receiver

Abstract: dd-00429VP DD-03282 DD-03182 DD-00429 DD03282 TMA4 7402 pinouts 00429VP
Contextual Info: DD-00429 ARINC 429 MICROPROCESSOR INTERFACE FEATURES DESCRIPTION two ARINC 429 Transmit channels Tx0 and Tx1 and can transmit data independently. The transmit data rate can also be programmed independently. There are two 32 x 32 bit FIFOs for each of the

TCET110G

Contextual Info: TCET110. G up to TCET4100 Vishay Telefunken Optocoupler with Phototransistor Output Description The TCET110./ TCET2100/ TCET4100 consists of a phototransistor optically coupled to a gallium arsenide infrared-emitting diode in a 4-lead up to 16-lead plastic