74 SERIES AND GATES Search Results

MA161

Contextual Info: DN74LS54 LS T T L DN74LS Series DN74LS54 74 LS ^ 4 - wide AND-OR-INVERT Gates • Description DN74LS54 contains four 2-input and four 3-input AND-ORINVERT gates. ^0^ ■ Features • • • • Low power consumption Pa = 4.5mW typical High speed ( tpa = 12ns)

Difference between LS, HC, HCT devices

Abstract: 74HCT AN-368 difference between HC LS series 74HCT databook 74HC240 ic ttl 74ls HC LS IC difference between 74ls and 74hc ic Cmos 74 HC ttl ls
Contextual Info: Fairchild Semiconductor Application Note 368 March 1984 The 54HC/74HC series of high speed CMOS logic is unique in that it has a sub-family of components, designated 54HCT/74HCT. Generally, when one encounters a 54/74 series number, the following letters designate some speed and

7451N

Abstract: FJH161 PIN OUT CONNECTIONS 6 INPUT FUNCTION LOGIC GATE D1116 FJH161A 6451N FJH166 pin diagram for all 74 series ttl gates 74-series ic all gate ic data 74
Contextual Info: FIHI6I FJH161A T.T.L. DUAL AND-OR-NOT TW O LEVEL LOGIC CIRCUITS Correspond to 74 Series types 7451IM, 6451N FJH 166 TEN TA TIV E DATA The FJH161, FJH161A and FJH166 a re tr a n s is to r - tr a n s is to r logic dual two plus two AND-OR-NOT g ates in the F J s e r ie s of in teg rated c irc u its . T hese dev ices can be

DM9000C

Abstract: DM9000 DM7420
Contextual Info: DM9004C ¡5g| National Jüä Semiconductor DM9004C Dual 4-Input NAND Gates General Description Absolute Maximum Ratings Note d T he D M 9004C d e vice is d e sig n e d to be used in e x is tin g s y s te m s a s re p la c e m e n ts fo r F a irc h ild 9000-type c irc u its .

sla6050

Abstract: SLA6270 SLA6080 SLA6430 SLA6620 SLA6000 AA132 SLA6270* plcc F44-6 SLA6140
Contextual Info: SLA6000 / - y .2 ' CMOS HIGH SPEED GATE ARRAY • • • • High Speed Silicon Gate CMOS Technology TTL and CMOS I/O Compatible High Output Drive Compatible Gate Densities from 513 to 6,206 Gates • DESCRIPTION The SLA6000 series consists of a group of 8 CMOS gate arrays with gate counts from 513 to 6,206 gates. The

SLA6270

Abstract: SLA6140 sla6430 Sla6000 SLA6080
Contextual Info: SbE D S-n 0 S SYSTEMS INC 7 ^ 32 ^ 0*1 00014Ô0 35b • SLA6000 CMOS HIGH SPEED GATE ARRAY • • • • High Speed Silicon Gate CMOS Technology TTL and CMOS I/O Compatible High Output Drive Compatible Gate Densities from 513 to 6,206 Gates ■ DESCRIPTION

DN74LS20

Abstract: MA161
Contextual Info: LS T T L DN74LS Series DN74LS20 DN74LS20 5 rO 74 U 5U3 Dual 4 - input P o sitiv e NAND Gates H Description P-1 DN74LS20 contains two 4-input positive isolation NAND gate circuits. I Features • • • • Low power consumption Pd = 4m W typical High speed (tpd = 10ns typical)

74c SERIES cmos logic data

Abstract: MM74C00N MM74C00M MM74C02N MM74C04 cmos 74C MM74C04M mm74c04n application MM74C04N N14A
Contextual Info: Revised January 1999 MM74C00 • MM74C02 • MM74C04 Quad 2-Input NAND Gate • Quad 2-Input NOR Gate • Hex Inverter General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS CMOS to achieve wide power supply operating range, low power consumption,

DN74LS02

Abstract: MA161 dn74LS02 PIN
Contextual Info: LS T T L DN74LS Series DN 74LS02 DN74LS02 DN 74- l S 0 2, Quad 2-input P o s itiv e NOR Gates • Description D N 7 4 L S 0 2 contains four 2-input positive isolation N O R gate circuits. ■ Features • L o w pow er consum ption P d = 1 lm W ty p ica l

Contextual Info: Advance Data Sheet February 1993 £ = — AT&T Microelectronics Optimized Reconfigurable Cell Array ORCA Series Field-Programmable Gate Arrays Features • High density: 3500 to 22,000 usable gates ■ High I/O: up to 288 usable I/O ■ High performance: 80 MHz system clock rate

Contextual Info: Revision 3 Accelerator Series FPGAs – ACT 3 Family Features • Up to 10,000 Gate Array Equivalent Gates up to 25,000 equivalent PLD Gates • Highly Predictable Performance with 100% Automatic Placeand-Route • As Low as 9.0 ns Clock-to-Output Times (–1 Speed Grade)

DN74LS08

Contextual Info: i_ o T T L D N 7 4 L S S e r i e s DN74LS08 DN74LS08 Oiv>74<-Sci> ? Quad 2-input Positive AND Gates • Description DN74LS08 contains four 2-input positive isolation AND gate circuits. P-1 ■ Features • • • • Low power consumption Pd = 17mW typical

74LS10

Contextual Info: SA NY O SEMICONDUCTOR là e d~| ? cn 7 D 7 b CORP G o p a b a a '3 I LC74HC10M C M O S High-Speed Standard Logic L C 7 4 H C Series 3034A i .¡S' * *• * , Triple 3-Input NAND Gate Z 14 1 A . Features ' " • The L C 7 4 H C 1 0 M consists o f 3 identical 3-input N A N D gates.

0PIC

Abstract: LS66 SN74L30 84LS 64LS 84ls AX-2016 MAX2719 hy74 L8128A SN7463
Contextual Info: V 84 F A M IL Y S E R IE S 54 S E R IE S M L S S E R IE S B4S S E R IE S 74 S E R IE S 54H S E R IE S 74H S E R IE S 5 4 L 74 F A M IL Y S E R IE S 7 4 L S E R IE S 7 4 LS S E R IE S 74S *00. *04, *H 0 0 ,1404. *L00, 'U M , XSOO, *100, *S04, '10. *20, *30

LCX14

Abstract: 74LCX14 74LCX14M 74LCX14MTC 74LCX14MTCX 74LCX14MX 74LCX14SJ 74LCX14SJX M14A
Contextual Info: LCX14 t* National Semiconductor 74LCX14 Low Voltage Hex Inverter with 5V Tolerant Schmitt Trigger Inputs General Description Features The LCX14 contains six inverter gates each with a Schmitt trigger input. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output

TEXAS INSTRUMENTS SN7400 SERIES

Abstract: sn7400
Contextual Info: SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SDLS025A − DECEMBER 1983 − REVISED AUGUST 2003 D Package Options Include Plastic Small-Outline D, NS , Shrink Small-Outline (DB), and Ceramic Flat (W) Packages,

rs flip-flop IC 7400

Abstract: 74ls105 TTL LS 7400 74LS series logic gates 7400 fan-out 74LS 3 input AND gate IC TTL 7400 schematic 74LS04 fan-out 74ls series logic family 90 watts inverter by 12v dc with 6 transisters
Contextual Info: GENERAL DESCRIPTION ABSOLUTE MAXIMUM RATINGS Ovar operating free-air temper­ ature range unless otherwise noted Supply Voltage Vq c (See Note 1) Input Voltage V|n (See Note 1) Interemitter Voltage (See Note 2) Resistor Node Voltage, 54121, 74121 (See Note 1)

M74HCxxxTTR

Abstract: 74ABT FAIRCHILD HEF4000B MM74HC nxp Cross-reference HEF4000 LVT32 SN74HC 74HC HC PORTFOLIO
Contextual Info: General-purpose logic solutions Commitment and innovation 2 Logic solutions Commitment and innovation NXP is deeply committed to the logic market and continually invests in new process and package technologies, and packaging facilities, to ensure that our portfolio remains leadingedge. We offer a very broad variety of innovative

full subtractor circuit nand gates

Abstract: 8 bit carry select adder verilog codes PLESSEY CLA low power and area efficient carry select adder v 32 bit barrel shifter vhdl advantages of master slave jk flip flop half adder 74 full subtractor circuit using nand gate 0-99 counter by using 4 dual jk flip flop 3 bit carry select adder verilog codes
Contextual Info: AUGUST 1992 2462 - 4.0 CLA70000 SERIES HIGH DENSITY CMOS GATE ARRAYS Supersedes March 1992 edition - version 3.1 Recent advances in CMOS processing technology and improvements in design architecture have led to the development of a new generation of array-based ASIC

74ls21 IC

Contextual Info: SANYO SEMICONDUCTOR CORP I EE D LC74HC21 PU 1 im a n n DQoat .33 a CMOS High-Speed Standard Logic LC74HC Series 3003a Dual 4-Input AND Gate E 1743C Features • The LC74HC21 consists of 2 identical 4-input AND gates. • Uses CMOS silicon gate process technology to achieve operating speeds similar to L S -T T L (74LS21 with the

hcf 4052 datasheet

Abstract: 4536b 74 HC 273A 4026B data sheet 4013B applications 4046b 4039B 40106B C3245 40147B
Contextual Info: CMOSultbis 28-06-2001 17:44 Pagina 1 The complete CMOS Logic Source Standard Logic Selection Guide CMOSultbis 28-06-2001 17:44 Pagina 2 FUNCTION SELECTOR HC/HCT,AC/ACT,VHC/VHCT, LCX,LVQ,LVX,VCX, LVC,V2G,V2T, V1G,V1T STANDARD CODE FUNCTION GATE BUFFER CMOS 4000B STANDARD CODE

Contextual Info: HCC4000B series RadHardened high voltage complementary MOS logic series Data Brief Features • 20V max operating voltage ■ Bufferized inputs and outputs ■ Standardized symmetrical outputs characteristic ■ 50ns typical propagation delays ■ 100nA max 25°C input current

TIL306 Application Notes

Abstract: TIL306 TL306 TIL307 Seven-Segment Numeric LED Display with latch TTL 1N3064 D1034 TIL307 equivalent TIL306 equivalent BCD counter
Contextual Info: TIL306, TIL307 NUMERIC DISPLAYS WITH LOGIC SLBS001 – D1034, JUNE 1982 – REVISED SEPTEMBER 1992 SOLID-STATE DISPLAYS WITH INTEGRAL TTL MSI CIRCUIT CHIP FOR USE IN ALL SYSTEMS WHERE THE DATA TO BE DISPLAYED IS THE PULSE COUNT • • • • • • •

Contextual Info: TM4164EL9, TM4164FM9 65,536 BY 9-BIT DYNAMIC RAM MODULES NOVEMBER 1983 - 6 5 ,5 3 6 X 9 Organization REVISED NOVEMBER 1985 TM 4164EL9 . . . L SINGLE-IN-LINE PACKAGE * T M 4 1 6 4 F M 9 . . . M SINGLE-IN-LINE PACKAGE Single 5-V Supply 10% Tolerance ITOP VIEW)