74 LS 18 Search Results

Contextual Info: SN54ALS168B, SN54ALS169B, SN54AS168, SN54AS169 S N 74 A LS 16 8 B , S N 74 A LS 16 9 B , S N 74 A S 16 8 , S N 74AS16 9 SYNCHRONOUS 4-BIT UP/DOWN DECADE A N D BINARY COUNTERS M AR C H 1 9 8 4 - • • I Fully Synchronous Operation for Counting and Programming

74AS871

Contextual Info: TEXAS INSTR LOGIC NOTICE SEE ORDER OF DATA FOR ERRATA ESE D • fiU17S3 QOflBTEE 1 ■ T-Vg-0?-0? S N 5 4 A LS 8 70 , SN 5 4AS 8 70 , S N 5 4 A LS 8 71, SN 5 4 A S 8 71 S N 74 A LS 8 70 , S N 74 A S 8 70 , S N 7 4 A L S 8 7 1 , S N 74 A S 8 71 INFORMATION

SN5474

Abstract: SN54LS74A SN54S74 SN74 SN7474 SN74LS74A SN74S74 LS74A
Contextual Info: S N 5 474, S N 5 4 LS 74 A . S N 5 4S 74, S N 7474. S N 74 LS 74 A , S N 74S 74 D U A L D -T Y P E P O S IT IV E E D G E T R IG G E R ED F LIP -FL O P S W ITH P R E S E T A N D C LE A R DECEMBER 1983 - Package Options Include Plastic "'Small Outline" Packages, Ceramic Chip Carriers

54s373

Contextual Info: SN54LS373, SN 54 LS374, SN54S373, SN54S374, S N 74 LS 3 73 , S N 74 LS 3 74 , S N 74 S 3 7 3 , S N 74 S 3 7 4 OCTAL D-TYPE T R A N S P A R EN T LATCHES A N D EDGE-TRIGGERED FLIP FLOPS O C T O B E R 1 9 7 5 — R E V IS E D M A R C H 1 9 8 8 SN 54LS3 73. SN 5 4 LS3 7 4 , SN 54S37 3,

4069UB

Abstract: LS245 4069UB 14 pins 4503B 40106B HC09 74HCoo 7HC125 HCT08 -74
Contextual Info: SELECTION GUIDE GATE/BUFFERS Type Number M54/74 Functional Equivalent LSTTL 54/74 Function Functional Equivalent CMOS 4000B Suggested Alternative LS 54/74 4000B Package DIP LSOO LSOO LS02 LS02 LS03 4011B 4011B 4001B 4001B 14 14 14 14 14 LS04 LS04 LS04 4069UB

64LS138

Contextual Info: S N 5 4 LS 13 8 , SN 54S138, S N 74 LS 13 8 , S N 74 S 13 8 A 3-LINE TO 8-LINE D EC OD ERS/DEM U LTIPLEXERS DECEMBER 1972 —REVISED MARCH 1988 Designed Specifically for High-Speed: Memory Decoders Data Transmission Systems I I 3 Enable Inputs to Simplify Cascading

SN74ALS176

Abstract: SN54ALS174 SN54ALS175 SN54AS174 SN54AS175A SN74ALS174 SN74ALS175 SN74AS174 SN74AS175A als174
Contextual Info: SN74ALS174, SN74ALS175, SN74AS174, SN74AS175A SN54ALS174, SN54ALS175, SN54AS174, SN54AS175A HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR D2661, APRIL 1 9 8 2 - REVISED M A Y 1986 S N 5 4A LS 1 74 , S N 5 4A S 1 74 . . . J PACKAGE S N 74A LS 174, S N 7 4 A S 1 7 4 . . . D OR N PACKAGE

LS1639

Abstract: 74ALS1639
Contextual Info: TYPES SN 54A LS1638, S N 54A LS1639, SN 74 A LS1 638 , S N 7 4 A LS 1 639 OCTAL BU S TRANSCEIVERS D2661, DECEMBER 1982-REVISED DECEMBER 1983 Bidirectional Bus Transceivers in High-Density 20-Pin Packages S N 54A LS 1638, S N 54A LS 1639 J PAC KA G E S N 74A LS 1638, S N 74ALS1639

Contextual Info: T Y P ES S N 5 4 ALS 242 A, SN 5 4ALS243 A, SN 54AS242, SN54AS243 S N 74 A LS 2 4 2 A , S N 74 A LS 2 4 3 A , S N 74 A S 2 4 2 , SN 74AS243 Q U AD R U PLE BUS TRAN SC EIVERS W ITH 3 S TA TE O U TPU TS D 2 6 6 1 , DECEMBER 1 9 8 2 -R E V IS E D DECEMBER 1 9 8 3

852-P

Abstract: dn74lsi
Contextual Info: PANASONIC INDL/ELEK ._ - ^6932862 . .- . .• _ _ . PANASONIC -CIO ~72 i>ËE 1.^35055 ODOh^aS 2 1 . Æ rt? £ A . ¿Lü . . I N D L ♦E L E C T R O N I C 72C 0 6 9 2 2 ._.-,• . d T t 'w 'IS* LS TTL DN7 4 L S Î /U —X _ -_ d n 74 l s i 7 - 1 / d n 74 LS 17 - is

SRG8

Abstract: 74als165
Contextual Info: TYP ES S N 5 4 A LS 16 S , S N 74 A LS 16 5 P A R A LLE L LO AD 8-BIT SH IFT REGISTERS D 2 6 6 1 , JU N E 1982 Complementary Outputs I• • SN 54A LS 165 . . . J PACKAGE S N 74A LS 165 . . . N PACKAGE Direct Overriding Load Data Inputs (TOP VIEW) Gated Clock Inputs

74LS84

Contextual Info: <8> MOTOROLA DE SC R IPTIO N - iT h e S N 54LS /74 LS 34 8and the S N 54LS /74 LS 84 8are eight input priority encoders w hich provide the 8-line to 3-line function. The outputs A 0-A2 and inputs (0-7) are active low The active low input w hich has the highest p rio rity (in p u t 7 has the highest) is represented on the

54AS832

Abstract: 74As832
Contextual Info: PRODUCT PREVIEW SN 54A LS 832A , SIU54AS832B, S N 74 A LS 8 32A , S N 74 A S832 B HEX 2-INPUT OR DRIVERS D 2 6 6 1 , OEC EM B ER 1982 - R E V ISE D M A Y 1986 High Capacitive Drive Capability S N 5 4 A L S 8 3 2 A , S N 5 4 A S 8 3 2 B . . . J P AC KA G E

LS1623

Contextual Info: T Y P E S SN 54ALS1620 THRU SN54ALS1623 S N 74 A LS 16 2 0 THRU S N 74 A LS 16 2 3 OC TAL BUS TRAN SC EIVERS D 2 6 6 1 , D EC EM BER 1 9 8 2 - R E V IS E D D EC EM B ER 19B3 Bus Transceivers in High-Density 20-Pin DIPs and the New Plastic and Ceramic Chip Carriers Packages

Contextual Info: LS TTL DN74LS Series DN74LS373 DN74LS373 K>74 LS. 373 Octal D-type Transparent Latches with 3 -sta te Outputs • Description DN 74LS373 contains eight 3-state output D-type latch circuits with com m on output-control enable inputs for all circuits. P-3

74s196

Abstract: 74196 TTL SN74S197 74S196 TTL
Contextual Info: SN54196, S N 5 4 19 7 , SN54LS196, S N 5 4 LS 19 7, SN54S196. S N 5 4 S 19 7, S N 74 1 9 6 , S N 7 4 1 9 7 , S N 74 LS 1 9 6 , S N 7 4 L S 1 9 7 , S N 74 S 1 9 6 , S N 7 4 S 1 9 7 50/30/1 OO MHz P R E S E T T A B LE DECADE OR BINARY COUNTERS/LATCHES OCTOBER 1 9 7 6 —REVISED M AR C H 1988

SN74AS644

Abstract: 74ALS643 T6141 als641a SN74ALS644 sn74as642 SN54ALS645A SN54AS640 SN54AS645 SN74AS640
Contextual Info: SN54ALS640A THRU SN 54ALS645 A, SN54AS640 THRU SN54AS645 S N 74 A LS 6 4 0 A THRU S N 74 A LS 6 4 5 A , SN 74AS6 40 THRU SN74AS645 OC TAL BUS TRANSC EIVERS D 2 6 6 1 , DECEMBER 19 8 3 -R E V IS E D M A Y 1 9 8 6 S N 5 4 A L S ', S N 5 4 A S ' . . . J P AC KA G E

multiplexers 74 LS 150

Abstract: 74LS255 74LS190 up down decade counter 74LS190 pins bcd counter 74 90 74LS192 pins 74LS191 74LS221 LS386 ls95b
Contextual Info: Digital Circuits 9LS/54LS/74LS Low Power Schottky Cont. Description Type Number Prop Delay1 (ns) or Max. Op. Freq. (MHz)2 Available Packages Pwr Oiss. (mW) 9LS/54LS/74LS190 9LS/54LS/74LS191 9LS/54LS/74LS192 9LS/54LS/74LS193 9 LS/54 LS/74 LSI 94 A BCD decade counter, mode control

74as373

Abstract: LS 373
Contextual Info: T Y P ES S N 5 4A LS 3 73 , SN 5 4AS 3 73 , S N 74 A LS 3 73 . S N 74 A S 3 73 OC TAL D T Y P E TR A N S P A R EN T LA TC H ES W ITH 3-STATE OUTPUTS D2661, APRIL 1 98 2 -REVISED DECEMBER 1983 S N 54A LS373, S N 54A S 373 . . . J PACKAGE 8 Latches in a Single Package

N74s174

Contextual Info: S N 5 4 1 74 , S N 5 4 1 75 , S N 5 4 L S 17 4 , S N 5 4 L S 17 5 , S N 5 4 S 1 7 4 , S N 5 4 S 175 , SN 74 174 , SN 74 175 , SN 74 LS 174, SN 74LS175, S N 74 S 174, SN74S175 HEX/QUADRUPLE D-TYPE FLIP FLOPS WITH CLEAR D E C E M B E R 1 9 7 2 - R E V l S E D M A R C H 1 9 8 8

SW 2596 ic

Abstract: SW 2596
Contextual Info: S N 5 4 A LS 75 8 , SN 5 4AS 75 8 , SN54AS759 S N 74 A LS 75 8 , S N 74 A S 75 8 , S N 74A S 75 9 Q U AD R U PLE BUS TR AN SC EIVER S WITH OPEN-C OLLECTO R O U TPU TS D 2 9 1 0 , D ECEM BER 1 9 8 3 -R E V IS E D M A Y 1 9 8 6 • S N 5 4 ' . . . J PACKAGE

Contextual Info: SN 5 4170 , S N 5 4 LS 170 , S N 74 170 , S N 74 LS 170 4 BY 4 REGISTER FILES WITH OPEN-COLLECTOR O U TPU TS M AR C H 1 9 7 4 - S e p a rate R e a d /W r ite A ddressing P erm its REVISED M AR C H 1 9 8 8 S N 5 4 1 7 0 , S N 5 4 L S 1 7 0 . . . J OR W PACKAG E

ALS81

Abstract: SN54ALS811 SN54AS811 SN74ALS811 SN74AS811 02837
Contextual Info: S N 5 4 A LS 8 1 1, S N 74 A LS 8 11, SN 54AS811, SN 74AS811 QUADRUPLE 2 INPUT EXCLUSIVE NOR GATES WITH QPEN-COLLECTOR OUTPUTS 0 2 8 3 7 , MARCH Package Options Include Plastic "Sm all Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-m il DIPs

SN74ALS2242

Abstract: als224 SN54ALS2242
Contextual Info: S N 54A LS 2242, S N 74A LS 2242 QUADRUPLE BUS TRANSCEIVERS/MOS DRIVER MAY Bidirectional Quadruple Bus Transceivers For Driving MOS Devices S N 54A L S 2242 . . . J PACKAGE 5N 74 A L S 2242 . . . D O R N PACKAGE T O P V IE W I/O Ports Have 25 Ohm Series Resistors so