7256S Search Results

7032S

Abstract: pf8282a
Contextual Info: Index J u n e 1996 Numerics B 3.3-V devices C onfiguration EPROM devices 393 F L EX 8000 devices 121 M A X 7000 devices 331 selection guide 26 3 .3 -V /5 .0 -V operation C onfiguration EPRO M devices 394 B & C M icrosystem s, Inc. 591 BBS 708 BitBlaster Serial D ow nload Cable

PLSM-6402

Abstract: epm9320 10K50 flex 10k20 10K30A
Contextual Info: Ordering Information M a y 19 99, v e r. 10 Altera Devices Figure 1 explains the ordering codes for Altera devices. Devices that have m ultiple pin counts for the same package include the pin count in their ordering codes. Some codes use relative numbers e.g., -1, -2 to

32 Bit Counter

Abstract: loadable counter 32 Bit loadable counter vhdl up down counter truth table
Contextual Info: ispLSI 5384VA Application: High Speed Binary Counters latch. There are 35 PTs per macrocell from the product term sharing array PTSA , five dedicated for that macrocell and the rest from the three nearest neighbors above and below. The 5PT-bypass path can be used to

9560a

Abstract: epm tqfp-144 484 pin BGA diagram 144-Pin PLCC/TQFP Package Pin-Out Diagram EPM3128A 256 pin diagram 10k50 Power PQFP 64 Altera 7032 FLEX 6000 144-Pin PLCC/TQFP Package Pin-Out D
Contextual Info: ¨ Component Selector Guide June 1999 S System-on-a-ProgrammableChip Solutions In today’s changing marketplace, time-to-market is the key to success. Altera’s product offerings help companies get to market first by addressing a wide range of needs from simple glue logic requirements to the challenges

alien h3

Abstract: epm7192s pin
Contextual Info: includes MAX 7000E& MAX 700OS M AX 7000 Programmable Logic Device Family July ^898, ver. 5.03 Features . . . S8 88 £8 S8 SSS H igh-perform ance, EEPROM -based p rogram m able logic devices PLDs based on second-generation M ultiple A rray MatriX (MAX)

PJO 399

Abstract: PJO 389 PJO 499 B13128 pjo 489 7512A PJO 376 PJO 386
Contextual Info: MMMA. MAX 7000A Includes MAX7000AE Programmable Logic Device Family May 1999, ver. 2 Data Sheet Features. • ■ ■ Prelim inary Information ■ ■ ■ ■ High-performance CMOS EEPROM-based programmable logic devices PLDs built on second-generation Multiple Array MatriX

Contextual Info: MAX 7000 Includes MAX 7000E & MAX 7000S Programmable Logic Device Family April 1998. ver. 5.02 Data Sheet Features. . P ^ ^ * ^ P ^ High-performance, EEPROM-based programmable logic devices PLDs based on second-generation Multiple Array M atrix (MAX) architecture

Contextual Info: MAX 7000 Includes MAX 7000E & MAX 7000S Programmable Logic Device Family January 1998. ver. 5 Features. Data Sheet • ■ ■ ■ ■ ■ ■ High-perform ance, EEPR O M -based program m able logic devices P L D s based on second-generation M u ltip le A rra y M a triX (M A X )

max 7128S programmer

Abstract: 7128E 10K30 EPF81188AGC232-3 ep600i altera 5032 PLSKT 10K20 epm9320 7160E
Contextual Info: Ordering Information June 1996, ver. 8 Altera Devices Figure 1 explains the ordering codes for Altera devices. Devices that have multiple pin counts for the same package include the pin count in their ordering codes. Some codes use relative numbers e.g., -1, -2 to designate

loadable counter

Abstract: 4-bit loadable counter synchronous binary counter with latch 32 Bit Counter ASYNCHRONOUS COUNTER UP FUNCTION OF PRESET COUNTER LOAD Synchronous 8-Bit Binary Counters up down counter 5384VA EPM7384AEFC256-7
Contextual Info: ispLSI 5384V E Application: High Speed Binary Counters latch. There are 35 PTs per macrocell from the product term sharing array PTSA , five dedicated for that macrocell and the rest from the three nearest neighbors above and below. The 5PT-bypass path can be used to

EPCS 16 soic

Abstract: ALTERA EP EPM3128ATC100-7 ep 1810 program altera marking 10K130E PL-APU 10K30 ADD-FLOATPC 20K30E
Contextual Info: Ordering Information April 2003, ver. 15 Altera Devices Figures 1 and 2 explain the ordering codes for Altera® devices. Devices that have multiple pin counts for the same package include the pin count in their ordering codes. For information on specific package, speed grade,

7256S

Abstract: 7032S epm7120
Contextual Info: ¿sonissy M A X 7000 M X7080EÌ MAX7000S Programmable Logic Device Family June 1996, ver. 4 Data Sheet Fe a tu re s. • ■ ■ ■ ■ ■ ■ ■ ■ H ig h -p erfo rm an ce, E E P R O M -based p ro g ram m ab le logic d ev ices (P LD s based on seco n d -g en eratio n M u ltip le A rray M a trix (M A X )

ALTERA MAX 3000

Abstract: EPCS 16 soic Altera Programming Hardware 7128s 9560A
Contextual Info: Ordering Information February 2003, ver. 14 Altera Devices Figures 1 and Figures 2 explain the ordering codes for Altera® devices. Devices that have multiple pin counts for the same package include the pin count in their ordering codes. For information on specific package,

EP20K400E

Abstract: ep1k10 pci epm9320 64/44-PIN
Contextual Info: コンポーネント セレクタ・ガイド The Programmable Solutions Companyで あるアルテラ・コーポレーションは半導体業 界の中でも特に急成長を遂げている、高集積プ ログラマブル・ロジック・デバイス（PLD）の

Contextual Info: MAX 7000B Programmable Logic Device Family February 2000. ver. 2.0 Data Sheet Features. • P re lim in a ry In fo rm a tio n ■ High-performance 2.5-V CMOS EEPROM-based programmable logic devices PLDs built on second-generation Multiple Array M atrix (MAX ) architecture (see Table 1)

RQFP

Contextual Info: Introduction to ISP April 1997, ver. 1 The Altera® in-system programmability ISP feature makes prototyping easy during design development, streamlines manufacturing, and increases design flexibility. ISP also enables quick and efficient field upgrades.

Altera flex 8k PCi

Abstract: 10K50 10K30A altera epc 610 ALTERA MAX 5000 programming plcc 20pin socket EPM7032L 9560a flex 10k20 7160S
Contextual Info: Ordering Information January 1998, ver. 9 Altera Devices Figure 1 explains the ordering codes for Altera devices. Devices that have multiple pin counts for the same package include the pin count in their ordering codes. Some codes use relative numbers e.g., -1, -2 to designate

AN7257S

Abstract: 3SK181 AN7243S Car FM tuner tuner General T 1000
Contextual Info: ICs for FM/AM Tuner AN7243S FM Front-end Circuit for Car Radio • Overview Unit : mm 1 2 3 4 5 6 7 14 13 12 11 10 9 8 0.3 10.1±0.3 1.5±0.2 temper- ature characteristics to RF amp. 0.15 0.65 0.1±0.1 ■ Features • High sensitivity • High S/N ratio • Good IM characteristics at strong input

AN7257S

Abstract: 7243S 3SK181 AN7243S FM front-end ic Transistor SP-30 470pf 2040t
Contextual Info: ICs for FM/AM Tuner AN7243S FM Front-end Circuit for Car Radio • Overview Unit : mm 0.3 10.1±0.3 1.5±0.2 temper- ature characteristics to RF amp. 14 13 12 11 10 9 8 0.15 0.65 0.4±0.25 1.24 0.1±0.1 ■ Features • High sensitivity • High S/N ratio • Good IM characteristics at strong input

TD 265 N 600 KOC

Abstract: core i5 520 Scans-049 camtex trays sii Product Catalog EPM9560 film hot BT 342 project TIL Display 7160S
Contextual Info: 1996 Data Book Data Book June 1996 A-DB-0696-01 Altera, MAX, M A X+PLUS, FLEX, FLEX 10K, FLEX 8000, FLEX 8000A, MAX 9000, MAX 7000, MAX 7000E, MAX 7000S, FLASHlogic, MAX 5000, Classic, M AX+PLUS II, PL-ASAP2, PLDshell Plus, FastTrack, AHDL, MPLD, Turbo Bit, BitBlaster, PENGN, RIPP 10, PLS-ES, ClockLock, ClockBoost,

4-bit loadable counter

Abstract: loadable counter 32 Bit loadable counter EPM7384AEFC256-7 32 Bit Counter up down counter truth table ASYNCHRONOUS COUNTER UP FUNCTION OF PRESET 32 Bit loadable counter vhdl
Contextual Info: ispLSI 5384V Application: High Speed Binary Counters term sharing array PTSA , five dedicated for that macrocell and the rest from the three nearest neighbors above and below. The 5PT-bypass path can be used to bypass the PTSA. Each GLB also has 68 inputs fed from

loadable counter

Abstract: 32 Bit loadable counter up down counter truth table ASYNCHRONOUS COUNTER UP FUNCTION OF PRESET 32 Bit Counter 4-bit loadable counter 32 Bit loadable counter vhdl Synchronous 8-Bit Binary Counters up down counter EPM7384AEFC256-7
Contextual Info: ispLSI 5384V Application: High Speed Binary Counters term sharing array PTSA , five dedicated for that macrocell and the rest from the three nearest neighbors above and below. The 5PT-bypass path can be used to bypass the PTSA. Each GLB also has 68 inputs fed from

256-pin Plastic BGA 17 x 17

Abstract: excalibur Board
Contextual Info: Component Selector Guide March 2002 Altera Corporation S System-on-a-ProgrammableChip Solutions Altera Corporation, The Programmable Solutions Mercury devices contain clock-data recovery CDR enabled transceivers with support for data rates of up to 1.25 gigabits per second (Gbps) per channel.

73d12

Abstract: epm7032 algorithm
Contextual Info: Includes MAX 7000E & MAX 7000S M A X 7000 Programmable Logic Device Family May 1999. ver. 6 Data Sheet Featll res • ■ ■ ■ ■ ■ H igh-perform ance, EEPROM -based p rogram m able logic devices PLDs based on second-generation M ultiple A rray M a trix (MAX®)