7 PIN INVERTER Search Results

half adder

Abstract: fairchild rtl DTL Fairchild 945 930 DTL Fairchild 958 Fairchild 958 counter rtl micrologic 900 micrologic 945 dtl DIGITAL-DTL
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-DTL G18 945, 948 G17 941, 951 Vcc = Pin 14 G N D = Pin 7 G20 9111 G19 950 □ w 14 J 1 3 J1 2 FF s 13 c □ 10 □ 8 •T h e s e inputs are cap a citiv ely c oup led. V cc = Pin 14 G N D = Pin 7 Vcc = Pin 14 G N D = Pin 7

RS flip-flop

Abstract: rs-flip-flop nand GATE 951 Monostable Multivibrator "NAND Gate" micrologic 6 inputs OR gate DTL Fairchild DIGITAL-DTL 951 dtl
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-DTL G18 945, 948 G17 941, 951 Vcc = Pin 14 G N D = Pin 7 G20 9111 G19 950 □ w 14 J13 J12 FF s 13 c □ 10 □ 8 •T h e s e inputs are cap a citiv ely c oup led. V cc = Pin 14 G N D = Pin 7 Vcc = Pin 14 G N D = Pin 7

fairchild micrologic 960

Abstract: fairchild 946 HALF ADDER Fairchild 936 dtl 946 DTL Fairchild 946 rtl decade counter fairchild 937 Dtl 937 micrologic
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-DTL G7 1812 G8 9157, 9158 □ □ □ " G9 933 ¡ 3 14 ,4 13 12 * L 3C 4L 3 J10 sL 7L Vcc = Pin 14 G N D = Pin 7 N o c o n n ec tio n req uired to V g c P in 1 4 . Vcc = Pin 14 G N D = Pin 7 G10 946, 949 Vcc = Pin 14

"NAND Gate"

Abstract: 5 input nand gate dtl TTL NOR Gate 949 dtl TTL 3 input or gate fairchild micrologic DIGITAL-DTL 951 monostable 951 Monostable Multivibrator micrologic
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-DTL G7 1812 G8 9157, 9158 □ ,4 □ 13 □ 12 G9 933 ¡ 3 14 * L 3 C 4L 3 " J10 sL 7L Vcc = Pin 14 G N D = Pin 7 N o c o n n ec tio n req uired to V g c P in 1 4 . Vcc = Pin 14 G N D = Pin 7 G10 946, 949 Vcc = Pin 14

micrologic

Abstract: 9094 Quad TTL to MOS Driver DIGITAL-DTL dtl 948 951 monostable 951 Monostable Multivibrator 11C24 11C44 11C58
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-DTL G7 1812 G8 9157, 9158 □ ,4 □ 13 □ 12 G9 933 ¡ 3 14 * L 3 C 4 L 3 " J 1 0 s L 7L Vcc = Pin 14 G N D = Pin 7 N o c o n n ec tio n req uired to V g c P in 1 4 . Vcc = Pin 14 G N D = Pin 7 G10 946, 949 Vcc = Pin 14

RS flip-flop

Abstract: 936 dtl 949 dtl nand GATE DTL 9157 fairchild 9112 micrologic Hex inverter rs-flip-flop fairchild micrologic
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L-D T L G7 1812 G8 9157, 9158 □ □ □ G9 933 ¡ 3 14 ,4 13 12 * L 3C " 3 4L J10 sL 7L Vcc = Pin 14 G N D = Pin 7 N o c o n n ec tio n req uired to V g c P in 1 4 . Vcc = Pin 14 G N D = Pin 7 G10 946, 949 Vcc = Pin 14

Contextual Info: ¡ET Preliminary Commercial INC. PEEL 20V8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Features Compatible with Popular 20V8 Devices — 20V8 socket and function compatible — Programs with standard 20V8 JEDEC file — 24-pin DIP/SOIC, 28-pin PLCC packages

74LS04 fan-out

Abstract: 7404PC 74LS04PC 74LS04 pinout 74s04p 74Ls04 fanout 74ls04 hex inverter 74LS04* hEX INVERTER 74LS04P 7404FC
Contextual Info: 04 CO NNECTIO N DIAGRAMS PINOUT A ^ 4 /7 4 0 4 ¡54H/74H04 ^ 4S /7 4 S 0 4 /54S/74S04A ^4LS/74LS04 / r Œ Œ [I Œ - 6 3 HEX INVERTER g n d ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%, T a = 0°C to +70° C

AR2425

Abstract: PD3024 PALCE20RA10
Contextual Info: USE GAL DEVICES FOR NEW DESIGNS FINAL COM’L: H-7/10/15/20 IND: H-7/10/15/20 Lattice Semiconductor PALCE20RA10 Family 24-Pin Asynchronous EE CMOS Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Low power at 100 mA ICC ■ TTL-level register preload for testability

AR2425

Abstract: palce20ra10 Pal programming PD3024
Contextual Info: FINAL COM’L: H-7/10/15/20 IND: H-7/10/15/20 Lattice/Vantis PALCE20RA10 Family 24-Pin Asynchronous EE CMOS Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Low power at 100 mA ICC ■ TTL-level register preload for testability ■ As fast as 7.5 ns maximum propagation delay

Contextual Info: COM’L: H-7/10/15/20 IND: H-7/10/15/20 * Advanced Micro Devices PALCE20RA10 Family 24-Pin Asynchronous EE CMOS Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Low power at 100 mA Ice ■ TTL-level register preload for testability ■ As fast as 7.5 ns maximum propagation delay

Contextual Info: IND: H-7/10/15/20 COM’L: H-7/10/15/20 Advanced Micro Devices PALCE20RA10 Family 24-Pin Asynchronous EE CMOS Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Low power at 100 mA Icc ■ TTL-level register preload for testability ■ As fast as 7.5 ns maximum propagation delay

cd 40938

Abstract: 4082B 4069UB 14 pins 4583B 4072B 4073B 4075B 40014B 4521B 4007UB
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-CMOS C83 4583B C84 40014B Rextna R extpa 5 (s ) (7 ) R extca He x t n b Vdd = Pin 16 Vss —Pin 8 0 = Pin Numbers C86 4075B C8S 4072B VDO r - nc C87 4073B Vdd V dd i^innrnFirarTim I q a _ 0 1^1 LLlLillilLLlliJUJLJ

Contextual Info: Prelim inary Commercial INC. PEEL 20V8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic F e a tu re s • Compatible w ith Popular 20V8 Devices — — — 20V8 socket and function compatible Programs with standard 20V8 JEDEC file 24-pin DIP/SOIC, 28-pin PLCC packages

74LVX14

Abstract: LVX14 MC74LVX04 MC74LVX14 MC74LVX14DR2 MC74LVX14DR2G MC74LVX14DTR2 MC74LVX14M
Contextual Info: MC74LVX14 Hex Schmitt Inverter With 5 V−Tolerant Inputs The MC74LVX14 is an advanced high speed CMOS Schmitt inverter. The inputs tolerate voltages up to 7 V, allowing the interface of 5 V systems to 3 V systems. The MC74LVX14 is pin and functionally compatible to the

6N137 opto

Contextual Info: Schematics and Specifications 8-Pin Package NC 1 + 2 V 10 Mbit/s High-Speed Logic Gate Output; DC Threshold Sensing Input 8 VCC 7 VE F – 3 NC 4 6 VO 5 GND 8-Pin Package Dual Channel + 1 V 8 VCC IFT (mA) max VOL (V) max ICCH (µs) max ICCL (mA) max tPHL/tPLH

Contextual Info: FINAL COM’L: H-7/10/15/20 IND: H-7/10/15/20 PALCE20RA10 Family AduaM nlccero 24-Pin Asynchronous EE CMOS Programmable Array Logic Devices DISTINCTIVE CHARACTERISTICS • ■ Low pow er at 100 m A Icc ■ TTL-level register preload for testability A s fast as 7.5 ns m axim um propagation delay

TA 8825 AN

Abstract: TA 8825
Contextual Info: 8276-A.F Product available in 0° to 7 5 °C tem p, range only. PIN CONFIGURATION DESCRIPTION Data Input and Data Enable are gated through inputs A and B. An internal inverter provides the complementary inputs to the first bit of the shift register. All inputs are fully buffered. Complementary Q

Hitachi DSA0095

Abstract: DP-14 FP-14DA FP-14DN HD74AC04 TTP-14D
Contextual Info: HD74AC04 Hex Inverter ADE-205-357 Z 1st. Edition Sep. 2000 Feature • Outputs Source/Sink 24 mA Pin Arrangement 1 14 VCC 2 13 3 12 4 11 5 10 6 9 GND 7 8 (Top view) DC Characteristics (unless otherwise specified) Item Symbol Max Unit Condition Maximum quiescent supply current

3 level inverter schematic diagram

Abstract: Power INVERTER schematic circuit schematic diagram inverter inverter circuit diagram schematic diagram of power inverter SP391 power inverter circuit diagram schematics power inverter schematic diagram SP391A 15-nsec
Contextual Info: H EX IN V E R T E R SP391A Hex Inverter With Open Collector PIN CONFIGURATION 14 13 12 1 10 i « n n n n n n n V cc L<jl Ujl • GND u u u Ü u u u 1 2. 3 4. S P 391A * O p e n - C o ! le c t o r O u t p u t s 5 6. 7 0?52 ELECTRICAL CHARACTERISTICS Notes 1,2,3, 5 and 7

DS41442

Abstract: DS41452 PIC16 example codes lin PIC16 example codes spi slave AN943 DS00943 DS00556 PIC16LF1518 PIC16 erase PIC16LF1519 Hex schmitt trigger ecl
Contextual Info: PIC16 L F1516/7/8/9 28/40/44-Pin Flash Microcontrollers with XLP Technology Devices Included In This Data Sheet: • PIC16F1516 • PIC16LF1516 • PIC16F1517 • PIC16LF1517 • PIC16F1518 • PIC16LF1518 • PIC16F1519 • PIC16LF1519 Extreme Low-Power Management

LR3715M

Abstract: "CT scan" circuit diagram matrix 7x8 IR remote control switch circuit diagram ir remote transmitter lr3715
Contextual Info: SHARP E L E K / MELEC iS E D IV | D flia a v ^ a o a a i? a 3 Remote Control Transmitter LSI i LR3715M T - 7 7 -// LR3715M • Remote Control Transmitter LSI Description ■ Pin Connections T h e L E 3715M is a CMOS LSI developed for use in in fra re d rem ote control tra n sm itte rs.

HD74HC04

Contextual Info: HITACHI/ LOGIC/ARRAYS/MEM TE DË| M4cìL5D3 D0103ah l 92D HD74HC04 # 10326 DT- Hex Inverters • PIN ARRANGEMENT ■ FEATURES E E Si • High Speed Operation; ^ ¡,¿ *7 .5 ty p . {C /.-E O p F 3 ' ,At • High O utput C urrent; Fanout of 10 L S T T L Loadi

74LS14PC

Abstract: 7414PC PIN OUT 74LS14 pin diagram of 7414 74LS14 5414DM schmitt trigger 7414 74LS14DC 7414DC 7414
Contextual Info: 14 CON NECTIO N DIAG RAM PINO UT A 54/7414 r '''54LS/74LS14 ¿v/ ' 7/ HEX SC HM ITT TRIGGER INVERTER I ORDERING CODE: See Section 9 PIN PKGS OUT Plastic DIP P A Ceramic DIP (D) A COMMERCIAL GRADE V cc = +5.0 V ±5%, T a = 0 °C to +70° C MILITARY GRADE