60595 Search Results

Contextual Info: IDT7216L IDT7217L 1 6 x 1 6 PARALLEL CMOS MULTIPLIERS Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • 1 6 x 1 6 parallel multiplier with double precision product • 20ns clocked multiply time • Low power consumption: 120mA • Produced with advanced submicron CEMOS high

kb 72 seven segment

Abstract: S7074 VJ-00 reset password s7 200 PMS430E325
Contextual Info: MSP430x32x MIXED SIGNAL MICROCONTROLLER SLAS164- FEBRUARY 1998 » Low Supply Voltage Range, 2.5 V - 5 . 5 V i Low Operation Current, 400 nA at 1 MHz, 3V • Ultra-Low Power Consumption Standby Mode Down to 0.1 pA • Five Power-Saving Modes • • Wakeup From Standby Mode in 6 ¡is

equivalent of transistor tt 2148

Abstract: equivalent of transistor tt 2146 equivalent for transistor tt 2146 transistor TT 2146 TT 2146 M4 A4 TPC1280 TT 2146 M4 D3 TRANSISTOR TT 2158 TT 2146 M4 G4 str z 2154
Contextual Info: TPC12 SERIES CMOS FIELD-PROGRAMMABLE GATE ARRAYS SRFS002C - D3963, DECEMBER 1991 - REVISED FEBRUARY 1993 • Three Arrays With Increased Densities • Up to 8000 Equivalent Gate Array Gates • • Supported by Tl Action Logic System TI-ALS Software •

la9240

Abstract: osc XTAL PLL 5121 sanyo optical pickup unit sanyo OPTICAL PICK-UP
Contextual Info: Ordering number : EN 5121B CMOS LSI LC78630E Compact Disk Player DSP Overview Package Dimensions The LC78630E is a CD-DA signal-processing LSI for use in video CD player systems. The LC78630E incorporates signal-processing circuits for demodulating and deinterleaving the EFM signal from the optical pickup, error

Contextual Info: STANDARD MICROSYSTEMS CORPORATION, FDC37C665GT FDC37C666GT PRELIMINARY 80 Arkav Drive. Hauppauge, NY 11788 516 435*6000 Fax (516) 231 -6004 kTM Advanced High-Performance Multi-Mode7 Parallel Port Super I/O Floppy Disk Controllers • • • • • FEA TU R ES

Contextual Info: 8Mb: 512K x 18, 256K x 32/36 PIPELINED, DCD SYNCBURST SRAM MT58L512L18D, MT58L256L32D, MT58L256L36D 8Mb SYNCBURST SRAM 3.3V Vdd, 3.3V I/O, Pipelined, Double-Cycle Deselect FEATURES • • • • • • • • • • • • • • • Fast clock and OE# access times

9436a

Contextual Info: ADVANCE MT55L128L18P, MT55L64L32P, MT55L64L36P 2.25Mb ZBT SRAM 3 .3V V od, Selectable Burst Mode FEATURES • • • • • • • • • • • • • • • • • High frequency and 100 percent bus utilization Fast cycle times: 7ns, 7.5ns, 8.5ns and 10ns

Contextual Info: ADVANCE i m n N 1 2 8 K x 18, 6 4 K x 32/36 LVTTL, F L O W - T H R O U G H Z B T S R A M O ^ M h MT55L128L18F, MT55L64L32F, MT55L64L36F 3.3V Vdd, Selectable Burst Mode FEATURES • • • • • • • • • • • • • • • • • High frequency and 100 percent bus utilization

"Spanning Tree"

Contextual Info: tia lile o . GT-48002A Switched Fast Ethernet Controller for 10OBaseX Please contact Galileo Technology for possible updates before finalizing a design FEATURES • Single-chip, low cost, Switched Fast Ethernet Controller - Provides packet switching functions between two

Contextual Info: ADVANCE M IC R O N 128K x 18>64K x 32/36 I 2. 5V I/O, P I P E L I N E D , S C D S Y N C B U R S T S R A M Q w | D I I D C T O Y I M O D U n O I C D ^ A ^ IU| i*l MT58LC128K18G1, MT58LC64K32G1, MT58LC64K36G1 3.3V Supply, +2.5V I/O, Pipelined, Burst Counter and Single-Cycle Deselect

Contextual Info: 7 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - 5 6 4 2 3 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. ALL RIGHTS RESERVED. LOC DIST AD 00 REVISIONS LTR L1 L2 8.13 DATE DESCRIPTION DWN REVISED PER E C O - 0 8 - 0 1 7 2 6 8 28A P R 09 REVISED PER E C 0 - 0 9 - 0 2 1 826

Contextual Info: ADVANCE ¡m m a r iM ' I 8Mb: 512K x 18, 256K x 32/36 PIPELINED, SCD SYNCBURST SRAM T O tttQ L ttffi INÇ. Q IM II% C V M P D I I D C T O lv ID D T I M v / D U n O I O D A R ii h i A IV I MT58L512L18P, MT58L256L32P, MT58L256L36P;MT58L512V18P, MT58L256V32P, MT58L256V36P

Contextual Info: ADVANCE 128Kx18>64Kx32/36 MICRON I Q w O T C D O i l | N D l r D I U 3.3V I/O, PI PELI NED, DCD S Y N C B U R S T SRAM MT58LC128K18C6, MT58LC64K32C6, MT58LC64K36C6 I D C T n O I A I UI n IV I 3.3V Supply, Pipelined, Burst Counter and Double-Cycle Deselect

Flip-Flop 7473

Abstract: zl58 7473 latch
Contextual Info: Actel Mask Programmed Gate Arrays Features Description Mask Programmed versions of Actel Field Programmable Gate Arrays FPGAs Significant cost reduction for medium- to high-volume applications Pin-for-pin compatible with Actel FPGAs PCI Local Bus Revision 2 Compliant

LC256

Abstract: 8941a
Contextual Info: ADVANCE 256K x 18. 128K x 32/36 2.5V I/O. PIPELINED, DCD SYNCBURST SRAM |U |IC =R O N MT58 LC256 K18 F 1 , MT58 LC128 K32 F 1, MT58 LC128 K36 F 1 SYNCBURST SRAM 3.3V Supply, +2.5V I/O, Pipelined, Burst Counter and Double-Cycle Deselect SYNCBURST SRAM FEATURES

NM6403

Abstract: 87FFFFF AR210
Contextual Info: NM6403 Software Development Kit NeuroMatrix NM6403 Assembly Language Overview Preliminary Version 30002-01 35 02 A  Module and NeuroMatrix® are registered trademarks of JSC Research Center MODULE. All other trademarks are the exclusive property of their respective owners.

NM6403

Abstract: TMS320C40 88888888h 276 SB2
Contextual Info: Базовое программное обеспечение процессора NM6403 NeuroMatrix  NM6403 Описание языка ассемблера Предварительная версия  Описание языка ассемблера

Contextual Info: 8 7 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - RELEASED FOR PUBLICATION BY TYCO ELECTRONIC5 CORPORATION. LOC ALL RIGHTS RESERVED. DIST REVISIONS AA 22 LTR REV PER EC 0S11-0188-03 [ . O 1 O] •OUTER A - 5 9 .1 8[ 2 .3 3 ] — 2 8 . 4 5 -[ 1 .1 2 ] .2 5 DWN

OKI nX-8

Contextual Info: O K I Semiconductor MSM65524/65P524 High-Performance CMOS 8-Bit Single-Chip Microcontroller DESCRIPTION The MSM65524 is a high-performance 8-bit single-chip microcontroller implementing large integra­ tion, high speed and low power consumption by using OKI's nX-8/50 CPU core. With a minimum

Contextual Info: / = 7 * JM> S C S -T H O M S O N KHWrnLKgTTWDgi ST72371/ST72372 8 -BIT MCUs W ITH 16K R O M /O TP/EPRO M , 512 BYTES RAM, ADC, DAC PW M , TIM ER , PC AND SCI PR O D U C T PREVIEW • User Program Memory (ROM/OTP/EPROM): 16K bytes ■ Data RAM: 512 bytes, including 256 bytes of

TMS320LC206

Contextual Info: TMS320C206, TMS320LC206 DIGITAL SIGNAL PROCESSORS * High-Performance Static CMOS Technology • Includes the ’320C2xLP Core CPU • TMS320C206, TMS320LC206 are Members of the ’C20x/’C2000 Platform Which Also Includes the TMS320C203/LC203 and TMS320F206 Devices

KC102

Contextual Info: |v i i c : 64K X 18, 32K x 32/36 3.3V I/O, PIPELINED, SCD SYNCBURST SRAM r o n MT58LC64K18D8, MT58LC32K32D8, MT58LC32K36D8 SYNCBURST SRAM 3.3V Supply, Pipelined, Burst Counter and Single-Cycle Deselect SYNCBURST SRAM FEATURES • • • • • • • •

subwoofer preamplifier circuit

Abstract: 20 band equalizer subwoofer subwoofer pre subwoofer amplifier 12v supply ERE-G180 tdm-7534 graphic equalizer 12db Preamplifier subwoofer subwoofer circuit
Contextual Info: 11 Band Graphic Equalizer/Preamplifier 1 of 2 CROSSOVER 80Hz PUSH SUB W. 50 BBE SUB W. 31.5 ERE-G180 FADER 63 125 190 250 500 1K 2.2K 4.5K 9K 18K +15 +12 +12 +12 +12 +12 +12 +12 +12 +12 +12 +12 F -12 -12 -12 -12 -12 -12 -12 -12 -12 -12 -12 R DEFEAT EQ 120

A1020A

Abstract: ACTEL A1010
Contextual Info: tHAY i & ’993 Æ 9 d m !I ACT 1 Field Programmable Gate Arrays Product Family Profile Features • Up to 2000 Gate Array Gates 6000 PLD/LCA™ equivalent gates • Replaces up to 53 TTL Packages • Replaces up to 17 20-Pin PAL™ Packages • Design Library with over 250 Functions