5FLB645B Search Results

Contextual Info: T em ic 7508B/7509B MATRA MHS Single Rail CODEC Description 7508B p-law and 7509B (A-law) are CMOS devices containing companding CODEC and PCM voice filters on a single chip. An important feature is the operation with only a single + 5V power supply, which is useful for ISDN

83c154f

Abstract: 63c154 T32 fuse
Contextual Info: M il DATA SHEET_ 8 0 C 1 5 4 | j / 8 3 C 1 5 4 jH HIGH SPEED 0 TO 42 MHz SINGLE-CHIP 8 BIT MICROCONTROLLER . . . . 80C154)i : ROMLESS VERSION OF THE 83C154p. 80C154(i/83C154(i-L : LOW POWER VERSION 2.7 V < Vcc < 5.5 V ; 0 < F h z < 16 MHz

S2MH

Contextual Info: IHM M 67024 DATA SHEET 4 K x 16 CMOS DUAL PORT RAM FEATURES . FAST ACCESS TIME: 35 NS TO 55 NS 30 NS PRELIMINARY FOR COMMERCIAL ONLY WIDE TEMPERATURE RANGE: - 55 °C TO + 125 °C 67024 L LOW POWER 67024 V VERY LOW POWER SEPARATE UPPER BYTE AND LOWER BYTE CONTROL

67130V

Abstract: ajr38 a9lc
Contextual Info: IlM l L 67130/L 67140 DATA SHEET 1Kx8 CMOS DUAL PORT RAM 3.3 Volt FEATURES . SINGLE 3.3 V ±0.3 VOLT POWER SUPPLY . FAST ACCESS TIME 45 NS * TO 70 NS . 67130L/67140L LOW POWER 67130V/67140V VERY LOW POWER . EXPANDABLE DATA BUS T 0 16 BITS OR MORE USING MASTER/SLAVE DEVICES WHEN USING

Contextual Info: Tem ïc TSC80C31/80C51 S e m i c o n d u c t o r s CMOS 0 to 44 MHz Single-Chip 8 Bit Microcontroller Description The TSC80C31/80C51 is high performance SCMOS versions of the 8051 NMOS single chip 8 bit |J.C. The fully static design of the TSC80C31/80C51 allows to

Contextual Info: IV n o m electronic June 1992 M 67204 Hl-REL DATA SHEET_ 4k x 9 CMOS PARALLEL FIFO FEATURES . EM PTY, FULL AND HALF FLAGS IN SING LE DEVICE MODE WIDE TEMPERATURE RANGE : - 55°C TO + 125°C . RETRANSMIT CAPABILITY . BI-DIRECTIONAL APPLICATIONS 67204 L LOW POWER

Contextual Info: Tem ic M 67024 MATRA MHS 4 K x 16 CMOS Dual Port RAM Description The M 67024 is a very low power CMOS dual port static RAM organised as 4096 x 16. The M 67024 is designed to be used as a stand-alone 16 bit dual port RAM or as a combination MASTER/SLAVE dual port for 32 bit or

temic 8051

Abstract: DIL-4 temic 80c51 marking 09x 80C31 TEMIC
Contextual Info: Tem ïc TSC80C31/80C51 S e m i c o n d u c t o r s CMOS 0 to 44 MHz Single-Chip 8 Bit Microcontroller Description The TSC80C31/80C51 is high performance SCMOS versions of the 8051 NMOS single chip 8 bit |J.C. The fully static design of the TSC80C31/80C51 allows to

F4T5

Abstract: selectronic MAD45 csta 020 26
Contextual Info: M l WHS electronic June 1992 90C600 HI-REL DATA SHEET The 90C600 chip-set is a 32-bit custom CMOS implementation of the SPARCT architecture. The 90C600 CPU includes the 90C601 Integer Unit IU , the 90C602 Floating-Point Unit (FPU), the 90C604 Cache controller and MMU (CMU),

N39L

Abstract: sy 170 29C532E N3999 C70I 20 pin edac
Contextual Info: Tem ic 29C532E Semiconductors 32-Bit Bus-Watch EDAC Error Detection And Correction unit 1. Description The 29C532E EDAC is a very low power bus-watch 32-bit Error Detection And Correction unit EDAC . EDAC is used in a high integrity system for monitoring