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Catalog Datasheet | Type | Document Tags | |
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5962-8863901Contextual Info: 54FCT573 Octal D-Type Latch with TRI-STATE Outputs General Description Features The ’FCT573 is an octal latch with buffered common Latch Enable LE and buffered common Output Enable (OE) inputs. This device is functionally identical to the ’FCT373 but has |
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54FCT573 FCT573 FCT373 5962-886390ze 8639012A 96288639012A 5962Cerdip 5962-8863901 | |
Contextual Info: 100307 Low Power Quint Exclusive OR/NOR Gate General Description The 100307 is monolithic quint exclusive-OR/NOR gate. The Function output is the wire-OR of all five exclusive-OR outputs. All inputs have 50 kΩ pull-down resistors. n n n n n Features 2000V ESD protection |
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Out7000 100307DMQB 9459001MX 5962Full 9459001MYA 5962Cerdip 9459001VXA 100307J | |
CERPAKContextual Info: 54FCT240 Octal Buffer/Line Driver with TRI-STATE Outputs General Description Features The 54FCT240 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved |
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54FCT240 54FCT240DMQB 54FCT240FMQB 54FCT240LMQB 20-Lead Dual-In-Line01RA 96287655012A CERPAK | |
ECL 100304Contextual Info: 100304 Low Power Quint AND/NAND Gate General Description The 100304 is monolithic quint AND/NAND gate. The Function output is the wire-NOR of all five AND gate outputs. All inputs have 50 kΩ pull-down resistors. n n n n n Features 2000V ESD protection Pin/function compatible with 100104 |
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DS100304-1 Outp7000 100304DMQB 9153701MX 5962Full 9153701MYA 5962Cerdip 9153701VXA 100304J ECL 100304 | |
Contextual Info: 100341 Low Power 8-Bit Shift Register General Description Features The 100341 contains eight edge-triggered, D-type flip-flops with individual inputs Pn and outputs (Qn) for parallel operation, and with serial inputs (Dn) and steering logic for bidirectional shifting. The flip-flops accept input data a setup |
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9459101MYA 5962Cerdip 9459101VXA 100341J 5962Full 9459101VYA 14-Jul-2000] | |
Contextual Info: 100301 Low Power Triple 5-Input OR/NOR Gate General Description The 100301 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. n n n n 2000V ESD protection Pin/function compatible with 100101 |
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DS100302-1 DS100302 24-Pin 9152801MXA 100301J 915280VXA 00301W 5962Full 9152801MYA | |
AN214 amplifier circuit diagram
Abstract: AN214 schematic diagram
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DS78C120 DS7820 AN-214: RS-422 RS-423 5-Dec-2000] 5Oct98 pdf\recode\DS78C120 AN214 amplifier circuit diagram AN214 schematic diagram | |
8b10b
Abstract: Transceivers CY7B923-400JC CY7B923-400JCT CY7B923-JC CY7B923-JCT CY7B923-JI CY7B923-JIT CY7B923-LMB CY7B923-SC
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CY7B923-400JC 400Mbps CY7B923-400JCT CY7B923-JC CY7B923-JCT tx/cyp/cy7b923 8B/10B, 8b10b Transceivers CY7B923-400JC CY7B923-400JCT CY7B923-JC CY7B923-JCT CY7B923-JI CY7B923-JIT CY7B923-LMB CY7B923-SC | |
8763001Contextual Info: 54FCT244 Octal Buffer/Line Driver with TRI-STATE Outputs General Description Features The ’FCT244 is an octal buffer and line driver with TRI-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/ |
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54FCT244 FCT244 54FCT244DMQB 54FCT244FMQB 54FCT244LMQB 20-Lead 20-Ler 96287630012A 5962Cerdip 8763001 | |
ON769
Abstract: CLC432AJP
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CLC431/432 CLC431 CLC432 92MHz 28Vpp. OA-30: ON769 CLC432AJP | |
Contextual Info: 54ACQ240 • 54ACTQ240 Quiet Series Octal Buffer/Line Driver with TRI-STATE Outputs General Description The ’ACQ/’ACTQ240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which |
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54ACQ240 54ACTQ240 ACTQ240 7-Mar-2001] pdf\recode\54ACTQ240 | |
ECL 100151Contextual Info: 100351 Low Power Hex D Flip-Flop General Description Features The 100351 contains six D-type edge-triggered, master/ slave flip-flops with true and complement outputs, a pair of common Clock inputs CPa and CPb and common Master Reset (MR) input. Data enters a master when both CPa and |
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100351DMQB 9457901MX 5962Full 9457901MYA 5962Cerdip 9457901VXA 100351J 100351WQMLV 28-Jul-2000] ECL 100151 | |
Transceivers
Abstract: CY7B933-JCT 5962-9689601Q3A CY7B933-400JC CY7B933-400JCT CY7B933-JC CY7B933-JI CY7B933-JIT CY7B933-LMB CY7B933-SC
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CY7B933-400JC 400Mbps CY7B933-400JCT CY7B933-JC CY7B933-JCT tx/cyp/cy7b933 8B/10B, Transceivers CY7B933-JCT 5962-9689601Q3A CY7B933-400JC CY7B933-400JCT CY7B933-JC CY7B933-JI CY7B933-JIT CY7B933-LMB CY7B933-SC | |
Contextual Info: 100302 Low Power Quint 2-Input OR/NOR Gate General Description The 100302 is a monolithic quint 2-input OR/NOR gate with common enable. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. n n n n 2000V ESD protection Pin/function compatible with 100102 |
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DS100303-1 H2000 100302DMQB 9152802MX 5962Full 9152802MYA 5962Cerdip 9152802VXA 100302J | |
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54FCT245Contextual Info: 54FCT245 Octal Bidirectional Transceiver with TRI-STATE Outputs General Description Features The ’FCT245 contains eight non-inverting bidirectional buffers with TRI-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 48 mA on both the |
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54FCT245 FCT245 96287629012A 5962Cerdip 8762901RA 5962Full 8762901SA 7-Mar-2001] | |
Contextual Info: 100324 Low Power Hex TTL-to-ECL Translator General Description Features The 100324 is a hex translator, designed to convert TTL logic levels to 100K ECL logic levels. The inputs are compatible with standard or Schottky TTL. A common Enable E , when LOW, holds all inverting outputs HIGH and holds all |
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system100324DMQB 9153001MX 5962Full 9153001MYA 5962Cerdip 9153001VXA 100324J 9153001VYA | |
Contextual Info: 100336 Low Power 4-Stage Counter/Shift Register General Description The 100336 operates as either a modulo-16 up/down counter or as a 4-bit bidirectional shift register. Three Select Sn inputs determine the mode of operation, as shown in the Function Select table. Two Count Enable (CEP, CET) inputs |
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modulo-16 100336DMQB 9230601MX 5962Full 9230601MYA 5962Cerdip 9230601VXA 100336J 9230601VXA |