ACTQ240 Search Results

74ACQ240

Abstract: 74ACQ240PC 74ACQ240SC 74ACQ240SJ 74ACTQ240 74ACTQ240QSC 74ACTQ240SC 74ACTQ240SJ ACT240 74ACTQ240PC FAIRCHILD
Contextual Info: 74ACQ240 • ACTQ240 Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs General Description Features The ACQ/ACTQ240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which

74ACQ240

Abstract: 74ACQ240SC 74ACQ240SJ 74ACTQ240 74ACTQ240QSC 74ACTQ240SC 74ACTQ240SJ ACT240
Contextual Info: 74ACQ240, ACTQ240 Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs Features General Description • ICC and IOZ reduced by 50% ■ Guaranteed simultaneous switching noise level and The ACQ/ACTQ240 is an inverting octal buffer and line driver designed to be employed as a memory address

74ACQ240

Abstract: 74ACQ240PC 74ACQ240SC 74ACQ240SJ 74ACTQ240 74ACTQ240QSC 74ACTQ240SC 74ACTQ240SJ ACT240
Contextual Info: 74ACQ240 • ACTQ240 Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs General Description Features The ACQ/ACTQ240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which

Contextual Info: 74ACQ240, ACTQ240 Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs Features General Description • ICC and IOZ reduced by 50% ■ Guaranteed simultaneous switching noise level and The ACQ/ACTQ240 is an inverting octal buffer and line driver designed to be employed as a memory address

M2X diode

Abstract: 54ACTQ240LMQB 54ACTQ240 54ACTQ240DMQB 54ACTQ240FMQB
Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 07/12/96 Last Update Date: 03/19/99 Last Major Revision Date: 03/04/99 ACTQ240-X REV 2A0 Octal Buffer/Line Driver with TRI-STATE Outputs General Description The ACTQ240 is an inverting octal buffer and line driver designed to be employed as

Contextual Info: Q240 ga Semiconductor National 54ACQ/74ACQ240 • 54ACTQ/ACTQ240 Quiet Series Octal Buffer/Line Driver with TRI-STATE Outputs General Description Features The ’ACQ/'ACTQ240 is an inverting octal buffer and line driver designed to be employed as a memory address driv­

Contextual Info: S E M [CONDUCTOR TM 74ACQ240 • ACTQ240 Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs General Description The ACQ/ACTQ240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver

74ACQ240

Abstract: 74ACQ240PC 74ACQ240SC 74ACQ240SJ 74ACTQ240 74ACTQ240QSC 74ACTQ240SC 74ACTQ240SJ ACT240
Contextual Info: Revised November 1999 74ACQ240 • ACTQ240 Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs General Description Features The ACQ/ACTQ240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver

74ACQ240

Abstract: 74ACQ240PC 74ACQ240SC 74ACQ240SJ 74ACTQ240 74ACTQ240QSC 74ACTQ240SC 74ACTQ240SJ ACT240
Contextual Info: Revised November 1998 74ACQ240 • ACTQ240 Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs General Description Features The ACQ/ACTQ240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver

Contextual Info: Revised July 1999 74ACQ240 • ACTQ240 Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs General Description Features The ACQ/ACTQ240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver

74ACQ240

Abstract: 74ACQ240PC 74ACQ240SC 74ACQ240SJ 74ACTQ240 74ACTQ240QSC 74ACTQ240SC 74ACTQ240SJ ACT240
Contextual Info: Revised October 2000 74ACQ240 • ACTQ240 Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs General Description Features The ACQ/ACTQ240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver

54ACTQ16240

Abstract: WA48A
Contextual Info: 54ACTQ16240 16-Bit Inverting Buffer/Line Driver with TRI-STATE Outputs General Description Features The ’ACTQ16240 contains sixteen inverting buffers with TRI-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/

Contextual Info: S E M I C O N D U C T O R Revised November 1998 TM 74ACTQ16240 16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs General Description Features The ACTQ16240 contains sixteen inverting buffers with 3STATE outputs designed to be employed as a memory and

ADSP-21060 1993

Abstract: RXB38 ADSP-21000 national linear application notes book CU01 ADSP-21060 ADSP-21061 ADSP-21062 ADSP-2106X A-18
Contextual Info: ADSP-2106x SHARC Processor User’s Manual Revision 2.1, March 2004 Part Number 82-000795-03 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2004 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express

74ACTQ16240

Abstract: 74ACTQ16240MTD 74ACTQ16240SSC MS48A MTD48
Contextual Info: Revised May 2005 74ACTQ16240 16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs General Description Features The ACTQ16240 contains sixteen inverting buffers with 3STATE outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/

74ACQ240

Contextual Info: Q240 50 National mm Semiconductor 54ACQ/74ACQ240 • 54ACTQ/ACTQ240 Quiet Series Octal Buffer/Line Driver with TRI-STATE Outputs General Description Features The ’A C Q /’ACTQ240 is an inverting octal buffer and line driver designed to be employed as a memory address driv­

Contextual Info: tß 54A C Q 240 • 54A C TQ 240 Q uiet Series Octal B uffer/Line Driver w ith TRI-STATE O utputs General Description The ’A C Q /’AC TQ 240 is an inverting octal buffer and line d rive r designed to be em ployed as a m em ory address driver, clock d rive r and bus oriented tra n sm itte r or receiver w hich

Contextual Info: 54ACQ240 • ACTQ240 Quiet Series Octal Buffer/Line Driver with TRI-STATE Outputs General Description The ’ACQ/’ACTQ240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which

74ACTQ16240

Abstract: 74ACTQ16240SSC MS48A MTD48
Contextual Info: Revised N ovem ber 1998 E M IC O N D U C T G R T M 74ACTQ16240 16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs General Description Features T h e A C TQ 16240 contains sixteen inverting buffers with 3STATE outputs designed to be em ployed as a m em ory and

54ACQ

Abstract: 54ACQ240 54ACTQ240 ACT240
Contextual Info: 54ACQ240 • ACTQ240 Quiet Series Octal Buffer/Line Driver with TRI-STATE Outputs General Description The ’ACQ/’ACTQ240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which

Contextual Info: A I R C H May 1991 I L D Revised November 1998 E M I C Q N D U C T G R tm 74ACTQ16240 16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs General Description Features The ACTQ16240 contains sixteen inverting buffers with 3STATE outputs designed to be employed as a memory and

54ACQ

Abstract: 54ACQ240 54ACTQ240 ACT240
Contextual Info: 54ACQ240 • ACTQ240 Quiet Series Octal Buffer/Line Driver with TRI-STATE Outputs General Description The ’ACQ/’ACTQ240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which

54ACTQ16240

Abstract: 54ACTQ16240FMQB
Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 12/19/96 Last Update Date: 05/06/97 Last Major Revision Date: 03/21/97 MN54ACTQ16240-X REV 0A0 16-Bit Inverting Buffer/Line Driver with TRI-STATE Outputs General Description The ACTQ16240 contains sixteen inverting buffers with TRI-STATE outputs designed to be

ADSP 21 XXX Sharc processor

Abstract: inverter handbook design parallel port/buffer computer dual core processor design dc link inverter JTAG series termination resistors pin diagram for core i7 processor Transferring data from an external device to memory ADSP-21060 ADSP-21061
Contextual Info: System Design 11.1 11 OVERVIEW This chapter provides hardware, software, and system design information. 11.2 ADSP-2106X PINS This section describes the pins of the ADSP-2106x and shows how these signals can be used in your system. Figure 11.1 illustrates how