54HSC Search Results

Contextual Info: GEC PLESSEY S I- M ] . ( \ I) 1J (. T O K 54HSC/T Series Radiation Hard High Speed CMOS/SOS Logic S S10504FSF Issue 1.4 N ovem ber 1990 Gates and Buffers Features 54H SC/T00 54HSC/T02 54HSC/T04 54HSC/T08 54HSC/T10 54H SC/T14 54HSC/T21 54HSC/T27 5 4 H SO T 3 2

XG404

Abstract: DB10 DS3595-5 ds35954 DS3595
Contextual Info: 54HSC/T630 54HSC/T630 Radiation hard 16-Bit ParallelError Detection & Correction Replaces June 1999 version, DS3595-4.0 DS3595-5.0 January 2000 The 54HSC/T630 is a 16-bit parallel Error Detection and Correction circuit. It uses a modified Hamming code to generate a 6-bit check word from each 16-bit data word. The

54175

Contextual Info: GEC P L E S S E Y M S E M I C O N D U C T O R S DS3594-3.3 54HSC/T Series RADIATION HARD HIGH SPEED CMOS/SOS LOGIC The CMOS/SOS HSC/T Series offer the combined benefits of low power, high speed CMOS with the inherent latch up immunity, Single Event Upset SEU immunity and the high

16-LINE TO 4-LINE PRIORITY ENCODERS

Abstract: t04 68 3 pin diode t04 68 3 pin transistor EB 36 3C GR "silicon on sapphire" 74 LS 04 Logic Gates cmos dual s-r latch MIL-STD-38510 multiplexers 74 LS 150 transistor T04
Contextual Info: 54HSC/T Series 54HSC/T Series Radiation Hard High Speed CMOS/SOS Logic Replaces May 1995 version, DS3594-3.3 The CMOS/SOS HSC/T Series offer the combined benefits of low power, high speed CMOS with the inherent latch up immunity, Single Event Upset SEU immunity and the high

54HST630

Abstract: DB10 DS3595-5
Contextual Info: 54HSC/T630 54HSC/T630 Radiation hard 16-Bit ParallelError Detection & Correction Replaces January 2000 version, DS3595-5.0 DS3595-5.1 July 2002 The 54HSC/T630 is a 16-bit parallel Error Detection and Correction circuit. It uses a modified Hamming code to generate a 6-bit check word from each 16-bit data word. The

DS3595-5

Abstract: 54HST630 DB10 DS3595 XG404
Contextual Info: 54HSC/T630 54HSC/T630 Radiation hard 16-Bit ParallelError Detection & Correction Replaces January 2000 version, DS3595-5.0 The 54HSC/T630 is a 16-bit parallel Error Detection and Correction circuit. It uses a modified Hamming code to generate a 6-bit check word from each 16-bit data word. The

Contextual Info: GEC P L E S S E Y S E M I C O N D U C T O R S DS3595-3.3 54HSC/T630 RADIATION HARD 16-BIT PARALLEL ERROR DETECTION & CORRECTION The 54HSC/T630 is a 16-bit parallel Error Detection and Correction circuit. It uses a modified Hamming code to generate a 6-bit check word from each 16-bit data word. The

Contextual Info: 54HSC/T Series 54HSC/T165 : Parallel Load 8-Bit Shift Register The 54HSC/T165 is an 8-Bit Serial Shift Register that shifts the data in the direction of QA to QHwhen clocked. Output Internal Outputs Clock Serial Parallel A.H Q* qb L X X X a.h a b H L L

Contextual Info: GEC PLESSEY SEMI CONDS 43E D • 37bäSS2 0Q1S114 D ■PL.SB T - f e 7 '2 . l- S ^ GEC PLESSEY 54 h s c /t i 38 M Decoder/Multiplexer W f t W G eneral Description The 54HSC/T138 is a 3-Line to 8-Line Decoder/Multiplexer, w ith inverted outputs. E n a b le In p u ts

Contextual Info: S i GEC PLESS EY S F M I C O N D U C T O K S DS3594-3.1 54HSC/T Series RADIATION HARD HIGH SPEED CMOS/SOS LOGIC The CMOS/SOS HSC/T Series offer the combined benefits of low power, high speed CMOS with the inherent latch up immunity, Single Event Upset SEU immunity and the high

54HSC630

Contextual Info: THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS 54HSC/T630 APRIL 1995 DS3595-3.4 54HSC/T630 RADIATION HARD 16-BIT PARALLEL ERROR DETECTION & CORRECTION The 54HSC/T630 is a 16-bit parallel Error Detection and Correction circuit. It uses a modified Hamming code to

74LS series nand gates

Abstract: NAND Gates Synchronous 8-Bit Binary Counters T164 T154 54HSC14 dual schmitt-trigger inverters 74LS series logic gates t163 8bit counter 74ls
Contextual Info: 54HSC/T Series 54HSC/T Series Radiation Hard High Speed CMOS/SOS Logic Replaces May 1995 version, DS3594-3.3 The CMOS/SOS HSC/T Series offer the combined benefits of low power, high speed CMOS with the inherent latch up immunity, Single Event Upset SEU immunity and the high

Contextual Info: S i GEC PLESS EY S E M IC O ND U CTO RS DS3595-3.4 54HSC/T630 RADIATION HARD 16-BIT PARALLEL ERROR DETECTION & CORRECTION The 54HSC/T630 is a 16-bit parallel Error Detection and Correction circuit. It uses a modified Hamming code to generate a 6-bit check word from each 16-bit data word. The

Contextual Info: Si GEC PLESS EY S E M I C O N D U C T O R S ADVANCE INFORMATION DS3593-2.2 15HSC Series RADIATION HARD HIGH SPEED CMOS/SOS LOGIC The 15HSC Series offer the conbined benefits of low power, high speed CMOS with the inherent latch up immunity, Single Event Upset SEU immunity and high level of radiation

Contextual Info: THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS APRIL 1995 15HSC Series ADVANCE INFORMATION DS3593-2.3 15HSC Series RADIATION HARD HIGH SPEED CMOS/SOS LOGIC The 15HSC Series offer the conbined benefits of low power, high speed CMOS with the inherent latch up immunity, Single

Contextual Info: GEC P LES S EY ^ I M I ( \ I) U t, T O K 15HSC Series Radiation Hard High Speed C M O S/SO S Logic S (Advanced Data) S10505ASF Issue 1.2 November 1990 Features • Radiation Hard to 1.5jim C M O S/SO S technology • High SEU immunity • Latch up free