528PS Search Results

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

7813 Texas Instruments Transistor

Abstract: TMS320C6000 TMS320C6474 C6000 C6474 C64X DDR2-667 SPRS552H BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

transistor d880

Abstract: BR17
Contextual Info: TMS320C6474 www.ti.com SPRS552E – OCTOBER 2008 – REVISED APRIL 2010 TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

8250 uart rxd

Abstract: SW TO MTS 102 A2
Contextual Info: TMS320C6671 Fixed and Floating-Point Digital Signal Processor Data Manual ADVANCE INFORMATION concerns new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. Literature Number: SPRS756

Contextual Info: TMS320C6674 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual ADVANCE INFORMATION concerns new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice.

transistor D880 circuit diagram application

Abstract: GP-07 BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

2e58

Abstract: BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

FINISAR

Abstract: FCM-8519-2-T4 hssdc - db9 FCM-8519-1-T4 AT24C01A P802 33lbs serial db9 connector 528ps
Contextual Info: Finisar Product Specification FCM-8519-1-T4 / FCM-8519-2-T4 Copper GBIC Transceiver Finisar’s FCM-8519-1-T4/FCM-8519-2-T4 copper GBIC transceivers comply with GBIC Specification Revision 5.41 . They are compatible with the Gigabit Ethernet 1000BASE-CX standard as specified in IEEE Draft P802.3z/D5.02 and with Fibre

D880 TRANSISTOR

Abstract: A00C equivalent transistor A214 BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

2A98

Abstract: SPRUGV9 MSM 8260 TMS320C6678 Q0E15 7251 sw f26 sensor 40bf 65 2224
Contextual Info: TMS320C6678 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual ADVANCE INFORMATION concerns new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice.

D880 CIRCUIT DIAGRAM

Abstract: SYS13 BR17
Contextual Info: TMS320C6474 www.ti.com SPRS552E – OCTOBER 2008 – REVISED APRIL 2010 TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

RSV14

Contextual Info: TMS320TCI6616 Communications Infrastructure KeyStone SoC Data Manual ADVANCE INFORMATION concerns new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. Literature Number: SPRS624A

D880 voltage regulator

Abstract: SCR 2000 C6000 C6474 C64X DDR2-667 TMS320C6000 TMS320C6474 TRANSISTOR J 5804 EQUIVALENT SPRS552A
Contextual Info: TMS320C6474 Multicore Digital Signal Processor www.ti.com SPRS552A – OCTOBER 2008 – REVISED FEBRUARY 2009 1 Features • • • • • • • • • High-Performance Multicore DSP C6474 – 1-ns Instruction Cycle Time – 1.0-GHz Clock Rate – Eight 32-Bit Instructions/Cycle

d880 y

Abstract: transistor d880 SCR2000 SCR 2000 transistor A654 TMS320TCI6488 tms320tci6488cun TCI6487 TMS320TCI6487 ETB-2
Contextual Info: TMS320TCI6487 TMS320TCI6488 Communications Infrastructure Digital Signal Processor www.ti.com SPRS358H – APRIL 2007 – REVISED MAY 2009 • • • • • • • • • 1 High-Performance Communications Infrastructure DSP (TCI6487/8) – Instruction Cycle Time:

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

sprugy7

Abstract: pll 022a sprabh0 DDR3 jedec JESD79-3C lte turbo encoder 1GHz PRESCALER RF module that can used with TMS320C6670 "DDR3 SDRAM" 022d 744 312 011
Contextual Info: TMS320C6670 Multicore Fixed and Floating-Point System-on-Chip Data Manual ADVANCE INFORMATION concerns new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. Literature Number: SPRS689

Contextual Info: TMS320C6674 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual ADVANCE INFORMATION concerns new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice.

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

TCI6489

Abstract: Rake search accelerator CDMA system implementation Turbo Decoder wcdma viterbi
Contextual Info: TMS320TCI6489 SPRS626B – NOVEMBER 2009 – REVISED APRIL 2011 www.ti.com TMS320TCI6489 Communications Infrastructure Digital Signal Processor 1 Features • Key Features – High-Performance Communications Infrastructure DSP TCI6489 – 1.18-ns Instruction Cycle Time

SCR 2000

Abstract: C6474 2e58 BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

Contextual Info: TMS320C6674 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual ADVANCE INFORMATION concerns new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice.

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns