512KX4 Search Results

Contextual Info: a WHITE /MICROELECTRONICS 512Kx48SRAM MODULE WS512K48-XG4WX ADVANCED* FEATURES • ■ ■ ■ A ccess Tim es 17, 20, 25, 35ns ■ 2V D ata R etention Device Packaging: ■ TTL C om p atible Inputs and O utputs • 116 Lead, 40.0m m H e rm e tic CQFP Package 504

Contextual Info: SAMSUNG ELECTRONICS INC L7E D • 7^4142 KMM540512CM DD1 S D 7 0 ‘I b i DRAM MODULES 512Kx40 DRAM SIMM Memory Module FEATURES GENERAL DESCRIPTION • Performance range: The Samsung KMM540512CM isa512Kbitsx40 Dynamic RAM high density memory module. The Samsung

Contextual Info: MEMORY MODULE SRAM 512Kx40-SOP Static Ram MODULE 3DSR20M40VS6507 20 Mbit SRAM organized as 512Kx40, based on 256Kx16 Pin Assignment Top View SOP 84 (Pitch : 0.508 mm) Features - Fast Access Time : 12ns. - Power Supply 3.3V - Radiation Characteristics: Total Dose: 100Krad(Si)

Contextual Info: a WHITE /MICROELECTRONICS 512Kx48 SRAM MODULE WS512K48-XG4WX ADVANCED* FEATURES • A c c ess T im e s 17, 20, 25, 35ns ■ 2 V D ata R e te n tio n D evice ■ Packaging: ■ T T L C o m p a tib le In p uts and O u tp uts • 116 Lead, 4 0.0m m H e rm e tic CQFP Package 504

Contextual Info: MEMORY MODULE SRAM 512Kx40-SOP Static Ram MODULE 3DSR20M40VS6507 20 Mbit SRAM organized as 512Kx40, based on 256Kx16 Pin Assignment Top View SOP 84 (Pitch : 0.508 mm) Features - Fast Access Time : 12ns. - Power Supply 3.3V - Radiation Characteristics: Total Dose: 100Krad(Si)

Contextual Info: WS512K48-XG4WX M/HITE /M ICROELECTRONICS 512Kx48 SRAM MODULE ADVANCED* FEATURES • Acce ss Tim e s 17, 20, 25, 35ns ■ 2V Data R eten tio n Device ■ Packaging: ■ TTL C o m p a tib le Inputs and Outp u ts • 116 Lead, 4 0 .0 m m H e rm e tic CQFP Package 504

Contextual Info: a M/HITE /MICROELECTRONICS 512Kx48 SRAM MODULE WS512K48-XG4WX ADVANCED* FEATURES • A c c e s s T im e s 17, 20, 25, 35ns ■ 2V Data R etention D evice ■ Packaging: ■ T T L Com patible Inputs and Outputs • 116 Lead, 40.0m m H erm etic CQFP Packag e 504

512Kx48

Contextual Info: WS512K48-XG4WX HI-RELIABILITY PRODUCT 512Kx48 SRAM MODULE ADVANCED* FEATURES • 2V Data Retention Devices Available WS512K48L-XXX Low Power Version ■ Access Times 17, 20, 25, 35ns ■ Packaging: • 116 Lead, 40.0mm Hermetic CQFP (Package 504) ■ TTL Compatible Inputs and Outputs

512kx4

Abstract: EDI8M4512C A16-A18
Contextual Info: EDI8M4512C m o \ The future. . . 45/55/70 _ Module Ä ¥ Ä lN l I OINUFÚ^MñTDÚlN] 512Kx4 SRAM CMOS, High Speed Module Features The EDI8M4512C is a Two Megabit 512Kx4-bit High Speed Static RAM Module with four bi-directionai input/output lines. The module is constructed

512kx4

Abstract: EDI8M4512C
Contextual Info: EDI8M4512C 45/ 55/70 Module m o \ Tin fu tu ra . • • today. ÄE>WM0 E DKlFO^iMLÄTOÜIN] 512Kx4 SRAM CMOS, High Speed Module Features The EDI8M4512C is a Two Megabit 512Kx4-bit High Speed Static RAM Module with four bi-directionai input/output lines. The module is constructed

512kx4

Contextual Info: EDI8M4512C m o \ 45/55/70 Module The future. . . 512Kx4 SRAM CMOS, High Speed Module Features The EDI8M4512C is a Two Megabit 512Kx4-bit High Speed Static RAM Module with four bi-directionai input/output lines. The module is constructed of eight 64Kx4 Static RAMs in leadless chip carriers

Contextual Info: H Y 5 1 V 4 4 0 3 B • • H Y U N D A I S e r ie s IM x 4-bit CMOS DRAM with4CAS PRELIMINARY DESCRIPTION The HY51V4403B is the new generation and fast dynamic RAM organized 1,048,576 x 4-bit. The HY51V4403B has four CASs CAS0-3 which control corresponding data I/O port in conjunction with OE(eg. CASO controls DQO,

Contextual Info: •HYUNDAI SEMICONDUCTOR H Y 5 1 4 4 1 0 A S e r ie s 1M x 4-bit CMOS DRAM with Write-Per-Bit DESCRIPTION The HY514410A is the new generation and fast dynamic RAM organized 1,048,576 x 4-bit with function of Write-Per-Bit. The HY514410A utilizes Hyundai's CMOS silicon gate process technology as well as advanced

Contextual Info: » « H Y U N D A I e r ie s 1M x 4H_bŸjt 5C1M40 S4 0D R3 ABM Sw ,th 4C A S PRELIMINARY DESCRIPTION The HY514403B is the new generation and fast dynamic RAM organized 1,048,576 x 4-bit. The HY514403B has four CASs CAS0-3 which control corresponding data I/O port in conjunction with OE(eg. CSSO controls DQO,

Contextual Info: HY51V17400A Series •HYUNDAI 4M X 4-bit CMOS DRAM DESCRIPTION The HY51V17400A is the new generation and fast dynamic RAM organized 4,194,304 x 4-bit. The HY51V17400A utilizes Hyundai's CMOS silicon gate process technology as well as advanced circuit techniques to provide wide

w90n740cdg

Abstract: driver circuit for irs 2110 tms 3874 W90N740 w90n740cd 30B4 diode aic 3860 alps 502C MII 75-12 A3 SCC16
Contextual Info: W90N740CD/W90N740CDG DATA SHEET WINBOND 32-BIT ARM7TDMI-BASED MICRO-CONTROLLER The information described in this document is the exclusive intellectual property of Winbond Electronics Corporation and shall not be reproduced without permission from Winbond.

Contextual Info: 1,048,576 W O R D X 4 BIT D YN A M IC RAM * This is advanced information and specifica­ tions are subject to change without notice. DESCRIPTION The TC514410AP/AJ/ASJ/AZ is the new generation dynamic RAM organized 1,048,576 words by 4 bits. The TC514410AP/AJ/ASJ/AZ utilizes TOSHIBA’S CMOS Silicon gate process technology as well as

TC51440ASJ

Contextual Info: TOSHIBA TC514410ASJ-60/70/80 1,048,576 WORD X 4 BIT DYNAMIC RAM DESCRIPTION The TC514410ASJ is the new generation dynamic RAM organized 1,048,576 word by 4 bit. The TC514410ASJ utilizes Toshiba’s CMOS silicon gate process technology as well as advanced circuit techniques

uses of water level controller using timer 555 ic

Abstract: ha 13108 pal cvbs frame synchronizer x86 series sparkle 7404n STPCC0166BTC3 stpcc0166 60800 91211
Contextual Info: STPC CONSUMER  PC Compatible Embeded Microprocessor PRELIMINARY DATA • POWERFUL X86 PROCESSOR ■ 64-BIT BUS ARCHITECTURE ■ 64-BIT DRAM CONTROLLER ■ SVGA GRAPHICS CONTROLLER ■ UMA ARCHITECTURE ■ VIDEO SCALER ■ DIGITAL PAL/NTSC ENCODER ■ VIDEO INPUT PORT

crt 3BP1

Abstract: ali 3328 8mx32 simm 72 pin water level controller using timer 555 131-8D PCIM 176 display si 7200 gc 4Mx4 dram simm bitblt s3 common cathode 14-segment display driver
Contextual Info: STPC Client Programming Manual Issue 2.2 August 28, 2000 STMicroelectronics 1/446 Information provided is believed to be accurate and reliable. However, ST Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringements of patents or other

Contextual Info: TOSHIBA TC51V4400ASJL/AFTL80 1,048,576 WORD X 4 BIT DYNAMIC RAM DESCRIPTION The TC51V 4400ASJL/AFTL is the new generation dynam ic RAM organized 1,048,576 w ord by 4 bit. The TC51V 4400A SJL/AFTL utilizes T oshiba's CM OS silicon gate process technology as w ell as advanced

IS61WV5128EDBLL

Abstract: is61wv5128
Contextual Info: IS61WV5128EDBLL IS64WV5128EDBLL 512K x 8 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH ECC NOVEMBER 2011 DESCRIPTION The ISSI IS61/64WV5128EDBLL is a high-speed, FEATURES • High-speed access time: 8, 10 ns • Low Active Power: 85 mW typical • Low Standby Power: 7 mW (typical)

images of pin configuration of IC 74138

Abstract: t5 94v-0 tv philips pin out diagram of 74138 ic IC 3-8 decoder 74138 pin diagram 3-8 decoder 74138 pin diagram W99702 irs12 microcontroller ic 74148 SmartCard Writer 74148 IC datasheet
Contextual Info: W90P710CD/W90P710CDG 32-BIT ARM7TDMI-BASED MCU W90P710CD/W90P710CDG 16/32-bit ARM microcontroller Product Data Sheet -1- Publication Release Date: September 19, 2006 Revision B2 W90P710CD/W90P710CDG Revision History REVISION DATE COMMENTS A 2005/12/02 Draft

Contextual Info: KH ED/8L322S6V 25SKx32 SRAM ELECTRONIC DESIGNS NC. 256KX32,13V, StaticRAM Features The EDI8L32256V is a high speed, 3.3 volt, 8 megabit SRAM. The device is available with access times of 12,15, 256Kx32 bit C M O S Static 17 and 20ns, allowing the creation of a no wait state DSP