4M CMOS SRAM 256K X 16 Search Results

Contextual Info: SD718CF256 256K x 18 CMOS Synchronous Burst Flow-Through SRAM Features Functional Description • +3.3V+10%, -5% Power Supply The SD718CF256 is a high speed 4M, 262,144 x 18 cell, synchronous burst CMOS Static RAM organized as 256K words by 18 bits that supports high performances

IS62WV25616ALL

Abstract: IS62WV25616BLL IS62WV25616BLL-55TLI
Contextual Info: IS62WV25616ALL IS62WV25616BLL ISSI 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM MAY 2005 FEATURES DESCRIPTION • High-speed access time: 55ns, 70ns The ISSI IS62WV25616ALL/IS62WV25616BLL are highspeed, low power, 4M bit SRAMs organized as 256K words

IS62WV25616ALL

Abstract: IS62WV25616BLL
Contextual Info: IS62WV25616ALL IS62WV25616BLL ISSI 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM DECEMBER 2003 FEATURES DESCRIPTION • High-speed access time: 55ns, 70ns The ISSI IS62WV25616ALL/IS62WV25616BLL are highspeed, low power, 4M bit SRAMs organized as 256K words

is62wv25616bll-55tli

Abstract: IS62WV25616ALL IS62WV25616BLL tsd 1196
Contextual Info: IS62WV25616ALL IS62WV25616BLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM FEATURES MARCH 2008 DESCRIPTION The ISSI IS62WV25616ALL/IS62WV25616BLL are high- • High-speed access time: 55ns, 70ns speed, low power, 4M bit SRAMs organized as 256K words

IS65WV25616ALL

Abstract: IS65WV25616BLL
Contextual Info: IS65WV25616ALL IS65WV25616BLL ISSI 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM PRELIMINARY INFORMATION JANUARY 2003 FEATURES DESCRIPTION • High-speed access time: 55ns, 70ns The ISSI IS65WV25616ALL/IS65WV25616BLL are highspeed, low power, 4M bit SRAMs organized as 256K words

Contextual Info: ISSI IS62WV25616ALL IS62WV25616BLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM PRELIMINARY INFORMATION OCTOBER 2002 FEATURES DESCRIPTION • High-speed access time: 55ns, 70ns The ISSI IS62WV25616ALL/IS62WV25616BLL are highspeed, low power, 4M bit SRAMs organized as 256K words

2cs 3150

Contextual Info: ISSI IS62WV25616CLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM NOVEMBER 2002 FEATURES DESCRIPTION • High-speed access time: 55ns, 70ns The ISSI IS62WV25616CLL are high-speed, low power, 4M bit SRAMs organized as 256K words by 16 bits. It is

Contextual Info: ISSI IS62WV25616CLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM FEBRUARY 2003 FEATURES DESCRIPTION • High-speed access time: 55ns, 70ns The ISSI IS62WV25616CLL are high-speed, low power, 4M bit SRAMs organized as 256K words by 16 bits. It is

Contextual Info: SD718C256 256K x 18 CMOS Synchronous Burst Pipline SRAM Features Functional Description • +3.3V+10%, -5% Power Supply The SD718C256 is a high speed 4M, 262,144 x 18 cell, synchronous burst pipelined CMOS Static RAM organized as 256K words by 18 bits that supports high performances secondary cache applications of the PentiumTM

Contextual Info: ISSI IS62WV25616CLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM PRELIMINARY INFORMATION SEPTEMBER 2002 FEATURES DESCRIPTION • High-speed access time: 55ns, 70ns The ISSI IS62WV25616CLL are high-speed, low power, 4M bit SRAMs organized as 256K words by 16 bits. It is

Contextual Info: IS62WV25616DALL/DBLL, IS65WV25616DBLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM MARCH 2013 DESCRIPTION The ISSI IS62WV25616DALL and IS62/65WV25616DBLL FEATURES • High-speed access time: 35, 45, 55 ns are high-speed, low power, 4M bit SRAMs organized as

DBLL

Contextual Info: IS62WV25616DALL/DBLL, IS65WV25616DBLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM MARCH 2013 FEATURES DESCRIPTION The ISSI IS62WV25616DALL and IS62/65WV25616DBLL • High-speed access time: 35, 45, 55 ns are high-speed, low power, 4M bit SRAMs organized as

IS62WV25616DBLL-45BLI

Contextual Info: IS62WV25616DALL/DBLL, IS65WV25616DALL/DBLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM SEPTEMBER 2010 FEATURES DESCRIPTION The ISSI IS62WV25616DALL/IS62WV25616DBLL are • High-speed access time: 35, 45, 55 ns high-speed, low power, 4M bit SRAMs organized as

Contextual Info: IS62WV25616DALL/DBLL, IS65WV25616DBLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM JUNE 2013 FEATURES DESCRIPTION The ISSI IS62WV25616DALL and IS62/65WV25616DBLL • High-speed access time: 35, 45, 55 ns are high-speed, low power, 4M bit SRAMs organized as

Contextual Info: HY62SF16406C Series 256K X 16bit full CMOS SRAM DESCRIPTION FEATURES T h e H Y 6 2 S F 1 6 4 0 6 C is a high speed, super low pow er and 4M bit full C M O S S R A M organized a s 2 5 6 K words by 16bits. T h e H Y 6 2 S F 1 6 4 0 6 C uses high perform ance full C M O S process technology

sram card 60 pin mitsubishi

Abstract: m5m51008c M5M5408
Contextual Info: L-41001-0E MITSUBISHI ELECTRIC Mitsubishi Low Power SRAM Technical Direction 256K 512K 1M 2M 4M 8M 16M Large Capacity Low Power SRAM High Speed Power down current 5.0V±0.5V : 55ns 256K : XL ver. 2µA max. 2.7V~3.6V : 85ns 70ns/55ns 1M : XL ver. 4µA max.

Contextual Info: January 2011 AS6C4016A 256K X 16 BIT LOW POWER CMOS SRAM FEATURES GENERAL DESCRIPTION •      The AS6C4016A families are fabricated by Alliance Memory advanced full CMOS process technology. The families support industrial temperature range and Chip Scale Package for user

KM424C256Z

Abstract: SIMM 30-pin 30-pin SIMM RAM KM41C256P KM44C256bp KM41C1000BJ 257J KM44C256BZ 1K x4 static ram 30-pin simm memory "16m x 8"
Contextual Info: FUNCTION GUIDE MEMORY ICs 2. PRODUCT GUIDE 2.1 Dynamic RAM Part Number Capacity Organization Speed ns Technology Features Packages Remark 64K bit KM4164BP 100/120/150 NMOS Page Mode 16 Pin DIP Now 256K bit KM41C256P KM41C256J KM41C256Z KM41C257P KM41C257J

Contextual Info: ALLIANCE MEMORY AS6C4016A LOW POWER, 256K x 16 SRAM Document Title 256K x 16 bit Super Low Power and Low Voltage Full CMOS Static RAM Revision History Revision No. History Date Remark 0.0 - Initial Draft May 26, 2003 Preliminary 0.1 - Add Pb-free part number

samsung dram

Abstract: cmos 4001 dip
Contextual Info: MEMORY ICs FUNCTION GUIDE 4. ORDERING INFORMATION 4.1 DRAM KM 4 X DRAM X XXXXX X X X SPEED ORGANIZATION X1 X4 X8 X9 X16 X18 PROCESS & POWER •C: CMOS, 5V •V: CMOS, 3 3V •6 •7 : •8 : •10: 60ns 70ns 80ns 100ns PACKAGE DIP SOJ ZIP TS O P n TR: Reverse

Contextual Info: MEMORY ICs FUNCTION GUIDE 4. ORDERING INFORMATION 4.1 DRAM KM 4 X X XXXXX X X X - XX DRAM SPEED 6 0n s ORGANIZATION •7 • 1: XI • 4: X4 70ns 80ns •1 0 100ns • 8 X8 • 9 X9 •1 6 X16 •1 8 X1S PROCESS & POWER •C CMOS. 5V •V CMOS. 3 3V PACKAGE

transistor KSP 42

Abstract: irf950 IRFP100 transistor KSP 56 transistor KSP 92 G 23 ksp 36 93 IRF9500 transistor KSP 13 Samsung "NAND Flash" "ordering information" IRFP p-channel
Contextual Info: ORDERING INFORMATION KSV 3100A C N/ + BURN-IN OPTIONAL (SEE BURN-IN PROGRAM) PACKAGE TYPE (SEE EACH SPEC OF DEVICE) OPERATING TEMP IC’S ONLY BLANK: SEE INDIVIDUAL SPEC C : 0 - 70°C I : - 40 - 85°C M : - 5 5 - + 125°C DEVICE NUMBER AND SUFFIX (OPTIONAL)

PD23C64020

Abstract: PD45D128442 4M84 PD45D128842 256M5 0443 IC PD23C64000AL 45V16A PD264 A80L
Contextual Info: IC Memory CD-ROM IC Memory CD-ROM X13769XJ2V0CD00 04-1 IC Memory Dynamic RAM • Synchronous DRAM: SDR Single Data Rate , 256M bits (x4 bits organization) Density (bits) Organization (words × bits × banks) Part number 256M★ 16M×4×4 µ PD45256441 Speed

SC4M

Contextual Info: MEMORY ICs FUNCTION GUIDE 4. ORDERING INFORMATION 4.1 DRAM KM 4 X X XXXXX X X X - XX DRAM SPEED •6 : 60ns •7 • 70ns •8 : 80ns •10: 100ns ORGANIZATION • 8 • 9 •16 • 18 X1 X4 X8 X9 X16 X18 PROCESS & POWER •C CMOS, 5V •V CMOS, 3 3V PACKAGE