441B2D3 Search Results

Contextual Info: HITACHI/ LOGIC/ARRAYS/M h7E m 441b2D3 0024553 H M 5 1 W 4 1 6 0 A / A L S e r ie s STb HITS Preliminary 262,144-Word x 16-Bit Dynamic Random Access Memory • DESCRIPTION H M 51W 4160A T T /A L T T /A R R /A L R R Series The Hitachi HM51W4160A/AL are CMOS dynamic RAM

Contextual Info: HM5216808C Series HM5216408C Series 1,048,576-word x 8-bit x 2-bank Synchronous Dynamic RAM SSTL-3 2,097,152-word x 4-bit x 2-bank Synchronous Dynamic RAM (SSTL-3) HITACHI ADE-203-617 (Z) Preliminary Rev. 0.0 Jul. 10, 1996 Description A ll inputs and outputs are referred to the rising edge of the clock input. The HM5216808C Series,

Contextual Info: HB56SW464DB -6B/7B 4,194,304-word x 64-bit High Density Dynamic RAM Module HITACHI ADE-203-583B Z Rev. 2.0 Jan. 10, 1997 Description The HB56SW464DB is a 4M x 64 dynamic RAM Small Outline Dual In-line Memory Module (S.O.DIMM), mounted 16 pieces of 16-Mbit DRAM (HM51W16405B) sealed in TCP package and 1

R40 AH

Contextual Info: HM5283206 Series 131,072-word x 32-bit x 2-bank Synchronous Graphic RAM HITACHI ADE-203-223A Z Rev. 1.0 May. 30, 1996 Description All inputs and outputs signals refers to the rising edge of the clock input. The HM5283206 provides 2 banks to realize better performance. 8 column block write function and write per bit function are

hitachi l23

Contextual Info: HM5164405A Series HM5165405A Series 16777216-word x 4-bit Dynamic Random Access Memory HITACHI ADE-203-459 A (Z) Preliminary Rev. 0.1 Apr. 30,1996 Description The Hitachi HM5164405A Series, HM5165405A Series are CMOS dynamic RAMs organized 16,777,216word x 4-bit. They employ the most advanced CMOS, technology for high performance and lowpower. The

Contextual Info: HB56SW872ESNJ Series, HB56SW864ESNJ Series 8.388.608-word x 72-bit High Density Dynamic RAM Module 8.388.608-word x 64-bit High Density Dynamic RAM Module HITACHI ADE-203-764A Z Rev. 1.0 Apr. 4, 1997 Description The HB56SW872ESNJ, HB56SW864ESNJ belong to 8 Byte DIMM (Dual In-line Memory Module)

3240B

Contextual Info: HM5241605C Series 131,072-word x 16-bit x 2-bank Synchronous Dynamic RAM HITACHI ADE-203-381B Z Rev. 2.0 Jan. 7, 1997 Description All inputs and outputs are referred to the rising edge of the clock input. The HM5241605C is offered in 2 banks for improved performance.

Contextual Info: HM62832H Series 32768-Word x 8-Bit High Speed CMOS Static RAM Features Pin Arrangement • High speed: Fast access time 25/35/45 ns m ax • Low power A ctive: 300 mW (typ) Standby: IO j i W (typ) (L-version) • Single 5 V supply • Completely static memory

Contextual Info: S1E J> m MM^bSGa □Dl&^ao HM5116400L SGriGS Low Power version 4,194,304-Word x 4-Bit Dynamic Random A cce ss Memory • DESCRIPTION 7 MM ■ H I T S Product Preview L O GI C / AR RA Y S/ M E M H IT A C H I/ T -M 4 -2 3 - '2 HM5116400U Series The Hitachi HM5116400 is a CMOS dynamic RAM organized 4,194,304 words x

Contextual Info: HM51W16160 Series HM51W18160 Series 1048576-word x 16-bit Dynamic RAM HITACHI ADE-203-635B Z Rev. 2.0 Dec. 5 ,1 9 9 6 Description The Hitachi HM51W16160 Series, HM51W18160 Series are CMOS dynamic RAMs organized as 1,048,576word x 16-bit. They employ the most advanced CMOS technology for high performance and low power.

memory cats

Abstract: HM5118160B HM5118160BJ-6 HM5118160BJ-7 HM5118160BJ-8 HM5118160BLJ-6 HM5118160BLJ-7 HM5118160BLJ-8
Contextual Info: HM5118160B Series 1048576-word x 16-bit Dynamic Random Access Memory HITACHI ADE-203-476 Z Preliminary Rev. 0.0 Dec. 6, 1995 Description The Hitachi HM5118160B is a CMOS dynamic RAM organized as 1,048,576-word x 16-bit. It employs the most advanced CMOS technology for high performance and low power. The HM5118160B offers Fast Page

HM65256BLP-10

Abstract: dp - 20t DG250 HM65256BFP-12T HM65256B HM65256BFP-10T HM65256BFP-15T HM65256BFP-20T HM65256BLFP-10T HM65256BLFP-12T
Contextual Info: HM65256B Series 5.0 V S u p p ly 32,768-w ord x 8-bit H ig h S p e e d P s u e d o S ta tic R A M Features • Single 5 V ±10% • Access time — CE access time: 100/120/150/200 ns — Address access time: 50/60/75/100 ns (in static column mode) • Cycle time

m514800

Abstract: D02fc 002B4 S4800 HM514800AJ-7 HM514800AJ-8 HM514800ALRR-7 HM514800ALRR-8 HM514800AZ-7 M514800A
Contextual Info: HM514800A/AL Series HM51S4800A/AL Series Preliminary 5 2 4,28 8-w o rd x 8 -b it D y n a m ic R a n d o m A c c e s s M em ory T he H itach i H M 514800A are C M O S dynam ic R A M o rg a n iz e d as 5 2 4 ,2 8 8 -w o rd x 8 -b it. HM 514800A have realized higher density, higher

HM514170-8

Abstract: HM514170 HM514170JP-8
Contextual Info: blE D • M 4 T b 2 G 3 0 D 2 3 2 3 4 SQM ■ HIT2 H M 5 1 4 1 7 0 , H M 5 1 4 1 7 0 L S e r i e s -262,144-w ord x 16-bit Dynamic Random Access Mem ory HITACHI/ LOGIC/ARRAYS/MEM The Hitachi HM 514170 are CM OS dynamic RAM organized as 2 6 2 ,144-word x 16-bit. HM 514170

HM51W4260CLTT-7

Contextual Info: HM51W4260C/CL Series Preliminary 262,144-w ord x 16-bit Dynam ic Random Access M em ory HITACHI T he H ita c h i H M 5 1 W 4 2 6 0 C /C L are CM O S dynamic RAM organized as 2 6 2 ,144-word x 16bit. H M 51W 4260C /C L have re alize d hig h er density, higher performance and various functions

Contextual Info: HB56UW873EJN Series 8388608-word x 72-bit High Density Dynamic RAM Module HITACHI ADE-203-703 Z Preliminary Rev. 0.0 Jan. 10, 1997 Description The HB56UW873EJN Series belong to 8-byte DIMM (Dual in-line Memory Module) family , and have been developed an optimized main memory solution for 4 and 8-byte processor applications. The

Contextual Info: HM514260A/AL-6R Series HM51S4260A/AL-6R Series Preliminary 262,144-word x 16-bit Dynamic Random Access Memory |_|ITAPL-11 m Rev. 0.1 May. 31,1994 I I The Hitachi HM514260A/AL are CMOS dynamic RA M o rg a n iz e d as 2 6 2 ,1 4 4 -w o rd x 1 6 -b it. H M 514260A /A L have realized h igher density,

Contextual Info: blE D • mSbSQB 002318b 721 ■ HIT2 HM514270/L Series Preliminary 262,144-word x 16-bit Dynamic Random Access Memory H IT A C H I/ The Hitachi HM514270 are CMOS dynamic RAM organized as 262,144-word x 16-bit. HM514270 have realized higher density, higher performance

d0323

Contextual Info: HM51W16165 Series HM51W18165 Series 1048576-word x 16-bit Dynamic RAM HITACHI ADE-203-650C Z Rev. 3.0 Feb. 24,1997 Description The Hitachi HM51W16165 Series, HM51W18165 Series are CMOS dynamic RAMs organized as 1,048,576-word x 16-bit. They employ the most advanced CMOS technology for high performance and

Contextual Info: HB56SW872ES-6/7 8,388,608-word x 72-bit High Density Dynamic RAM Module HITACHI ADE-203-765A Z Rev. 1.0 Apr. 4, 1997 Description The HB56SW872ES belongs to 8 Byte DIMM (Dual In-line Memory Module) family, and has been developed as an optimized main memory solution for 4 and 8 Byte processor applications. The

Contextual Info: HB526C264EN-10IN, HB526C464EN-10IN 1,048,576-word x 64-bit x 2-bank Synchronous Dynamic RAM Module HITACHI ADE-203-737C Z Rev. 3.0 May. 15,1997 Description The HB526C264EN, HB526C464EN belong to 8-byte DIMM (Dual In-line Memory Module) family, and have been developed as an optimized main memory solution for 8-byte processor applications. The

Contextual Info: HB56A832BS/SBS Series, HB56A432BR/SBR Series 8,388,608-word x 32-bit High Density Dynamic RAM Module 4,194,304-wordx 32-bit High Density Dynamic RAM Module HITACHI ADE-203-728A Z Rev.1.0 Feb. 20,1997 Description The HB56A832BS/SBS is a 8M x 32 dynamic RAM module, mounted 16 pieces of 16-Mbit DRAM

HM514190AJ8

Abstract: HM514190ATT M51419 HM514190AJ HM514190ATT-8 1011Q
Contextual Info: HM514190A/AL Series Preliminary 262,144-word x 18-bit Dynamic Random Access Memory The Hitachi HM514190A/AL are CMOS dynamic R A M o rg a n iz e d as 2 6 2 ,1 4 4 -w o rd x 1 8 -b it. H M 514190A /A L have realize d h ig h er d ensity, h ig h e r p e rfo rm a n c e and v a rio u s fu n c tio n s by

27L2L

Abstract: 3CK10
Contextual Info: HM5216165 Series 524,288-word x 16-bit x 2-bank Synchronous Dynamic RAM HITACHI ADE-203-280 A (Z) Preliminary Rev. 0.1 Oct. 20, 1995 Description All inputs and outputs are referred to the rising edge of the clock input. The HM5216165 is offered in 2 banks for improved performance.