40QMIL Search Results

JTW 3D

Contextual Info: M v T h I I ü i k i i 11 U A HY62V8400A- I /HY62U8400A-(I) Series I 512Kx8bit CMOS SRAM PRELIMINARY DESCRIPTION FEATURES The HY62V8400A-(I)/HY62U8400A-(I) is a high­ speed, low power and 4M bits CMOS SRAM organized as 524,288 words by 8 bits. The HY62V8400A-(I)/HY62U8400A-(I) uses Hyundai's

57V651620B

Contextual Info: HY57V651620BTC 4Mx16-bit, 4K Ref., 4Banks. 3.3V D E S C R I PT I ON The Hynix H Y 5 7 V 6 4 162 0H G is a 67,1 0 8 ,8 64 -b it CMOS require large m e m o r y dens ity and high band wi dth . Synchronous DRAM, ideally suited for the main memory applications

N82S212N

Abstract: n82s212an N82S212 D3802
Contextual Info: Philips Components-Signetics Document No. 8 5 3 -0 1 3 6 ECN No. 86487 Date of Issue N ove m b e r 11, 1986 Status P ro du ct S pecification 8 2 S 2 1 2 8 2 S 2 1 2 A 2304-bit TTL bipolar RAM M em ory Products DESCRIPTION APPLICATIONS The o rga n izatio n of th e 8 2S 212 and

m5m442256aj

Abstract: M5M442256A-1 5M442256AJ m5m442256a
Contextual Info: MITSUBISHI LSIs M5M442256AJ,L,TP, RT-7,-8,-10 FAST PAGE MODE 1 0 4 8 5 7 6 -B IT DUAL-PORT DYNAMIC RAM DESCRIPTION M 5 M 4 4 2 2 5 6 A J , L, TP, RT is a high speed 1048576-bit Dual Port Dynamic Memory equipped with a 2 5 6 K x 4 Dynamic RAM Port and a 5 1 2 x4 Serial Read/Write Port.

M5M482256

Abstract: M5M482256J
Contextual Info: MITSUBISHI LS Is M 5 M 4 8 2 2 5 6 J ,T P ,R T -7 ,-8 ,-1 0 FAST PAGE MODE 2097152-BIT DUAL-PORT DYNAMIC RAM DESCRIPTION PIN CONFIGURATION TOP VIEW M5M482256J, TP, RT is a high speed 2097152-bit Dual-Port Dynamic Memory equipped with a 256K x 8 Dynamic RAM

TSOP54-2

Contextual Info: HYB39S6440x/80x/16xAT L 64M B it Synchronous DRAM SIEMENS 64 MBit Synchronous DRAM Advanced Inform ation • High Performance: -8 -10 Units fCKmax. 125 100 MHz tCK3 8 10 ns tAC3 6 7 ns tCK2 10 12 ns tAC2 6 8 ns Multiple Burst Operation Automatic Command Programmable W rap Sequence: Sequential

Contextual Info: KMM366S1623BTL PC66 SDRAM MODULE KMM366S1623BTL SDRAM DiMM 16Mx64 SDRAM DIMM based on 8Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM366S1623BTL is a 16M bit x 64 Synchro­ • Performance range nous Dynamic RAM high density memory module. The Samsung

0117800T3-60

Contextual Info: IBM0117800 IBM0117800M IBM0117800B IBM0117800P 2 M x 8 11/10 DRAM Features • 2,097,152 word by 8 bit organization • Single 3.3V ± 0.3V or 5.0V ± 0.5V power supply • Standard Power SP and Low Power (LP) • 2048 Refresh Cycles - 32 ms Refresh Rate (SP version)

M5M482128AJ

Contextual Info: MITSUBISHI LSIs M 5 M 4 8 2 1 2 8 A J , T P , R T - 7 ,- 8 ,- 1 0 FAST PAGE MODE 1 0 4 8 S 7 6 -B IT DUAL-PORT DYNAMIC RAM DESCRIPTION M 5 M 4 8 2 1 2 8 A J , T P , RT is a high speed 1 0 4 8 5 7 6 -b it Dual Port Dynam ic M em o ry equipped w ith a 1 2 8 K x

Contextual Info: »«YUWPA! > — - • HY57V658010 2 Banks x 4 M x 8 8 it Synchronous DRAM DESCRIPTION The Hyundai H Y57V 658010 is a 67,108, 864-bit C M O S Synchronous DRAM, ideally suited for the main memory appli­ cations which require large memory density and high bandwidth. H Y 57V 658010 is organized as 2banks of

M5M482257

Contextual Info: MITSUBISHI LSIs M 5 M 4 8 2 2 5 7 J ,T P ,R T -7 ,-8 ,-1 0 HYPER PAGE MODE 2097152-BIT DUAL-PORT DYNAMIC RAM DESCRIPTION PIN CONFIGURATION TOP VIEW M 5 M 482 257 J, TP, RT is a high speed 2097152-bit Dual-Port Dynamic Memory equipped w ith a 2 5 6K x 8 Dynamic RAM

V1004C

Abstract: SA5V 3DQ11
Contextual Info: KM416C1004C, KM416C1204C KM416V1004C, KM416V1204C CMOS DRAM 1M x 16Bit CMOS Dynamic RAM with Extended Data Out DESCRIPTION This Is a family of 1,048,576 x 16 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of memory cells within the same row, so called Hyper Page Mode. Power supply voltage +5.0V or +3.3V , refresh cyde (1K Ref. or 4K