4035B Search Results

4035B

Abstract: 4000B 4035BDC
Contextual Info: 4035B 4-BIT UNIVERSAL SHIFT REGISTER D E S C R IP T IO N — The 40 3 5 8 is a fully synchronous edge-triggered 4 -B it Shift Register with a Clock Input CP , four synchronous Parallel Data Inputs (Pq—P 3), two synchronous Serial Data Inputs (J, K ), a synchronous Parallel Enable_lnput (PE), Buffered Parallel Outputs from all 4 -bit positions (Q 0-Q 3),

GD4035B

Abstract: 40358
Contextual Info: a S i : -*• GOLDSTAR TECHNOL OG Y INC-, DME D | 4DEÖ7S7 ÜDDlbTt, 3 4028757 G O L D S T A R TECHNOLOGY INC. 04E 01676 D T-Vé-0<7-05 4035B 4-BIT UNIVERSAL SHIFT REGISTER DESCRIPTION — The 4035B Is a fully synchronous edge-triggered 4-Bit Shift Register with a Clock

Contextual Info: AVG Semiconductors Technical Data DDi Available Q2, 1995 4035B 4-Bit Parallel-ln/Parallel-Out Shift Register 4035B This device cosists of a 4-stage clocked serial-shift register with synchronous parallel inputs and buffered parallel outputs. The Parallel/Serial P/S input allows serial-right shifting of

4035B

Abstract: 4035 4000B
Contextual Info: 4035B INTERNATIONAL, INC. CMOS 4-BIT PAR ALLEL IN/PARALLEL-OUT SHIFT REGISTER FE A T U R E S ♦ ♦ ♦ ♦ 4-Stage Clocked Serial-Shift Operation Synchronous Parallel Loading of All Stages J-K Serial Inputs to First Stage Asynchronous True/Com plem ent Control of all

Contextual Info: R&E INTERNATIONAL, INC. 4035B CMOS 4-BIT PARALLEL-IN/PARALLEL-OUT SHIFT REGISTER FEA TU RES ♦ ♦ ♦ ♦ 4-Stage Clocked Serial-Shift Operation Synchronous Parallel Loading of All Stages J-K Serial Inputs to First Stage Asynchronous True/Complement Control of all

CD4035B

Abstract: TC4035BP jrc 4035b M4035BP 4035B HCC4035B HFE40358P MB84035B MC14035B NJU4035B
Contextual Info: - 60 4035B 4 B it Shift Register mm a-> y ? fc"v ü i i • m a -7— y 94 8 t:•/ h 7U -/7 T A * 16V00 T/C 2 15 Q j K 3 -1-1403 J 4 13 Q4 C LEA R 5 12PI« Zcb * L - f l O P '2 7-|— Vss 8 9 PI I I A4 VD D ■4 Ì/ ' T )V 11Pis CLOCK. 61— P/S tftf 7 ’; r

DPX202700DT-4035B5

Contextual Info: 1/3 Multilayer Chip Diplexers For GPS / UMTS & LTE Conformity to RoHS Directive DPX Series DPX202700DT-4035B5 SHAPES AND DIMENSIONS 2.00±0.15 0.90±0.10 2 3 6 5 4 1.25±0.10 1 0.30±0.15 0.65±0.05 0.35±0.10 0.30±0.20 0.20±0.15 Terminal functions 1 Low-band

4035BDC

Abstract: 4035B 4000B
Contextual Info: 4035B 4-BIT UNIVERSAL SHIFT REGISTER D E SC R IP TIO N — The 4035B is a fu lly synchronous edge-triggered 4 -B it S h ift Register w ith a C lock In p u t CP fo u r synchronous Parallel Data Inputs (P0-P 3 ), tw o synchronous Serial Data Inputs (J, K ),

cd4036

Abstract: CD4035B cd4036b J10A CD4035BCN
Contextual Info: 4035BM/4035BC National Semiconductor C D 4035B M /C D 4035B C 4 - B it P a ra lle l-ln /P a ra lle l-O u t S h ift R eg ister General Description Features The 4035B 4-trft paralleMn/parallel-out shift register is a moniithic complementary MOS CMOS Integrated

Contextual Info: 4035B MSI 4-BIT UNIVERSAL SHIFT REGISTER The H E F 4035B is a f u lly synchronous edge-triggered 4 -b it s h ift register w ith a clo ck in p u t CP , fo u r synchronous parallel data in p u ts (Pg to P3 ), tw o synchronous serial data in p u ts IJ, K), a synchronous

40528

Abstract: astable Multivibrator 74 4557* cmos 4052B 4051B 4731B ci 4047B 4008B 4034b 40518 ic pin connection
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-CMOS C62 4104B © © © C63 4016B, 4066B © : Pin 1 vDDO V DDI = pin 16 VSS = Pin 8 C64 4052B 12 14 15 11 1 5 2 4 I II I I I I I 10 - V0aVls Y2a Y3aY0bY,bV2bY3b A0 9 • VDD " Pin 14 Zb T 13 Vgg = Pin 8 V EE = Pin 7

Contextual Info: R&E 4555B 4556B INTERNATIONAL, INC. CMOS DUAL 2-T0-4 LINE DECODERS FEATURES ♦ Buffered Outputs ♦ Selected Output Active High 4555B or Active Low (45S6B) Expandable ♦ CONNECTION D IA G R A M (all packages) Vd d I 16 DESCRIPTION The 4555 B and 4556B are constructed

Contextual Info: 4518B 4520B INTERNATIONAL, INC. CMOS DUAL UP COUNTERS FEATURES 4 Two Independent 4-B it Counters 4 Internally Synchronous fo r High Speed Dual BCD 4518B and Dual Binary (4520B) Configurations 4 D irect Reset 4 Logic Edge-Clocked Design 4 Trigger from either Edge o f Clock Signal

TDA0161 equivalent

Abstract: 1N3393 BDX54F equivalent byt301000 bux transient voltage suppressor ST90R9 ua776mh sgs 2n3055 Transistor morocco mje13007 inmos transputer reference manual
Contextual Info: SHORTFORM 1995 NOVEMBER 1994 USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED SGS-THOMSON PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF SGS-THOMSON Microelectronics. As used herein:

MM74HC

Abstract: M74HC 4048B 74LVQ00 4041UB 4069UB 4098B 40100B 4541B mm74hc153
Contextual Info: November ‘99 LCX LOW VOLTAGE LOGIC 3.3V With 5V Input/Output Tolerance SYMBOL Vcc Vi Top PARAMETER VALUE UNIT 2.7 to 3.6 V Input Voltage 0 to 5.5 V Operating Temperature -40 to 85 °C 24 mA 4 TYP * ns Supply Voltage Io Output Current tpd Delay Time @ Vcc=3.3v

SKIIP 33 nec 125 t2

Abstract: skiip 613 gb 123 ct RBS 6302 ericsson SKIIP 513 gb 173 ct THERMISTOR ml TDK 150M pioneer PAL 010a Project Report of smoke alarm using IC 555 doc SKiip 83 EC 125 T1 ericsson RBS 6000 series INSTALLATION MANUAL Ericsson Installation guide for RBS 6302
Contextual Info: Discontinued and Superseded Stock Number History. This document contains Discontinued and Superseded Stock Number History. The information is listed in the following format: Stock Number: The original RS Stock Number of the item. Brief Description: The Invoice Description of the item.

40106B

Abstract: 4093B equivalent 4041UB 4048B 4069UB 9204 4099B 9201 9306
Contextual Info: RADIATION HARDENED PRODUCTS Radiation Hardened versions of HCC 4000 series types are offered by SGS-THOMSON for special applications in Space, Biomedical and Military fields. These devices are supplied in accordance to the relevant Hi-Rel processing and screening specifica­

Contextual Info: 4035B Types CMOS 4-Stage Parallel In/Parallel Out Shift Register with J-K Serial Inputs and T ru e/ Complement Outputs High-Voltage Types {20-Volt Rating 3 Features: • 4-Stage clocked shift operation PA R A LLEL ■ J K inputs on first stage ■ Asynchronous True/Compiement control

CD4017 smd

Abstract: Ic cd4060 pin configuration 7012 smd ic CD4541 equivalent CD4010 circuit pin configuration cd4541 application CD4050AFB CD4017 equivalent CD4013BFB 4018A
Contextual Info: CMOS Logic ICs - CD4000B Series Features Compliance to MIL-STD-883 The Harris High-Reliability C D 400 0B S er es of high-voltage Harris C D 4 0 0 0 Series parts are in full compliance with Para­ graph 1.2.1 of M IL-S TD -883. Product is provided to m eet the

4001UB

Abstract: 4086B 4737V cmos 4072B 4059B
Contextual Info: 7 V FUNCTIONAL INDEX CMOS HE4000B F A M IL Y SURVEY Type numbers have a suffix which signifies the type o f package and burn-in option: P = plastic D IL ; D = ceramic cerdip D IL; T = plastic SO mini-pack; 2nd B = burn-in option 4000B : 4000V : 4000UB: HEC

4069DIE1

Abstract: HE 4011 4055DIE1 4069UB 14 pins 40174DIE1 4017DIE1 4012DIE1 HCF 4066 BE 40109DIE1 4068DIE1
Contextual Info: S G S-THOflSON 7929225 D7C D | 7 cJEliB 3 7 S G S SEMICONDUCTOR DOIS 1 7 M S | _7r* 4 3 - 2 . 1 CORP ORDERING NUMBER 4XXXXDIE1 SALE CODE For electrical characteristics see corresponding dual in-line type, For example: 4001 DIE1 corresponds to HCF 4001 BE or more generally

Contextual Info: COS/MOS INTEGRATED CIRCUIT ^ hcc/H 4035B 4035 B 4-STAGE PARALLEL IN /PAR A LLEL OUT SH IFT REGISTER • • • • • • • • • • • • • 4-STAGE CLOCKED SHIFT OPERATION SYNCHRONOUS PARALLEL ENTRY ON A L L 4 STAGES JK INPUTS ON FIRST STAGE

Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-CMOS C42 4015B C43 4014B 9 Da °B cpa CPB I I I I I 5 4 3 9 10 7 PL °S 1 0 - CP P0 5 4 13 14 I I 14 13 I I I 12 11 2 V DD = Pm 16 VDD rPm 16 VSS = Pm 8 vs s = Pm 8 C44 4021B C45 4006B 6 I II 11 — 6 M R b Q 0B Q 1BQ2 B Q3B

4006B

Abstract: 4014B 4015B 40160B 40161B 40194B 40195B 4021B 4031B 4035B
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-CMOS C42 4015B C43 4014B 5 7— 9 - PE Da 1 5 - dB 11 - DS CPA 1— cpb 10- CP 4 3 Pq P i 14 10 TTT 13 12 11 CP P2 P p4 p5 p6 p7 Vn n = Pin 16 DD ^SS =Pin 8 C45 4006B I l I I I I I I I 1 0 - 15 2 C44