4024B WITH TRUTH TABLE Search Results

IC 4024B

Abstract: Ic4024B 4024B with truth table TC74HC4024P
Contextual Info: TC74HC4024P/F TC74HC4024P/F 7-STAGE BINARY COUNTER The TC74HC4024 is a high speed CMOS 7-STAGE BINARY COUNTER/DIVIDER fabricated with silicon gate C2MOS technology. It operates approximately ten times as fast as that of metal-gate CMOS IC 4024B with the same power dissipation.

CMOS 4024 with truth table

Contextual Info: S G S-T H O M SO N sUHOTMOlBS M 54H C 4024 M 74H C 4024 7-STAGE BINARY COUNTER • HIGH SPEED tPD = 15 ns TYP. at VCc = 5V ■ LOW POWER DISSIPATION |cc = 4 nA (MAX.) at Ta = 25°C ■ HIGH NOISE IMMUNITY V|\|IH = V js|l = 28% Vcc (MIN). ■ OUTPUT DRIVE CAPABILITY

4024BP

Abstract: 4024B DIP14-P-300-2 TC74HC4024AF TC74HC4024AP
Contextual Info: TOSHIBA TC74HC4024AP/AF TO SH IBA CM OS D IG ITAL INTEGRATED CIRCUIT SILICON M ONOLITHIC TC74HC4024AP, TC74HC4024AF 7 -STA G E BINARY COUNTER The TC74HC4024A is a high speed CMOS 7 - STAGE BINARY COUNTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent

Contextual Info: SbE D • 7TSTE37 0040302 T4fl M S G T H SGS-THOMSON * 7 Mm S y - tf S - 2 ? - / 7 r M54HC4024 M74HC4024 S-TH0nS0N G 7-STAGE BINARY COUNTER ■ HIGH SPEED tPD = 15 ns TYP. at VCc = 5V ■ LOW POWER DISSIPATION Ice = 4 ¡A (MAX.) at TA = 25°C ■ HIGH NOISE IMMUNITY

Contextual Info: TC74HC4024AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC4024AP,TC74HC4024AF 7-Stage Binary Counter The TC74HC4024A is a high speed CMOS 7-STAGE BINARY COUNTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent

Contextual Info: SGS-THOMSON M54HC4024 M74HC4024 7 STAGE BINARY COUNTER • HIGH SPEED tpD = 13 ns TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 4 nA (MAX.) AT T a = 25" C ■ HIGH NOISE IMMUNITY V nih = V nil = 28 % Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY 10 LSTTLLO AD S

HC4024

Abstract: M74HC4024B1R 4024B with truth table 4024B M54HC4024 M54HC4024F1R M74HC4024 M74HC4024C1R M74HC4024M1R
Contextual Info: M54HC4024 M74HC4024 7 STAGE BINARY COUNTER . . . . . . . . HIGH SPEED tPD = 13 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25° C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE

4024B with truth table

Abstract: 4024B DIP14-P-300-2 TC74HC4024AF TC74HC4024AP
Contextual Info: TC74HC4024AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC4024AP,TC74HC4024AF 7-Stage Binary Counter The TC74HC4024A is a high speed CMOS 7-STAGE BINARY COUNTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent

4024B

Abstract: DIP14-P-300-2 TC74HC4024AF TC74HC4024AP
Contextual Info: TC74HC4024AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC4024AP,TC74HC4024AF 7-Stage Binary Counter The TC74HC4024A is a high speed CMOS 7-STAGE BINARY COUNTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent

Contextual Info: T O SH IB A TC74HC4024AP/AF TO SH IBA CM OS D IGITAL INTEGRATED CIRCUIT SILICON M ONOLITHIC TC74HC4024AP, TC74HC4024AF 7 -STAGE BINARY COUNTER The TC74HC4024A is a high speed CMOS 7 - STAGE BINARY COUNTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent

Contextual Info: R&E 4555B 4556B INTERNATIONAL, INC. CMOS DUAL 2-T0-4 LINE DECODERS FEATURES ♦ Buffered Outputs ♦ Selected Output Active High 4555B or Active Low (45S6B) Expandable ♦ CONNECTION D IA G R A M (all packages) Vd d I 16 DESCRIPTION The 4555 B and 4556B are constructed

SCL4000B

Contextual Info: 4508B INTERNATIONAL, INC CMOS DUAL 4-BIT LATCH FEATURES ♦ ♦ ♦ ♦ Two Independent Four-Bit Latches 3-State Outputs Direct Reset All Inputs Buffered CONNECTION DIAGRAM alt packages Q3g Q2g Q1 B QOg Disg MRg D3B D1B I d o b 1 D2B stb I V DD l 1 1 1 _L_J_I_ _i_L_

Contextual Info: 4518B 4520B INTERNATIONAL, INC. CMOS DUAL UP COUNTERS FEATURES 4 Two Independent 4-B it Counters 4 Internally Synchronous fo r High Speed Dual BCD 4518B and Dual Binary (4520B) Configurations 4 D irect Reset 4 Logic Edge-Clocked Design 4 Trigger from either Edge o f Clock Signal

qml-38535

Abstract: 4020B 4024B 4040B
Contextual Info: REVISIONS LTR DESCRIPTION APPROVED DATE YR-MO-DA REV SHEET REV SHEET 15 REV STATUS OF SHEETS REV SHEET PMIC N/A STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AG ENCIES OF THE DEPARTM ENT OF DEFENSE 8 PREPARED BY Marcia B Kelleher